TAS3218IPZP datasheet(45/79 Pages) TI

45 / 79 page

ELECTRICAL CHARACTERISTICS

MASTER CLOCK SIGNALS

TAS3218

www.ti.com ....................................................................................................................................................................................................... SLES235 – JULY 2008

over recommended operating conditions (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

3.3-V TTL

IOH = 4 mA

2.4

VOH

High-level output voltage,

1.8-V LVCMOS (XTL_OUT)

IOH = 0.55 mA

1.44

3.3-V TTL

IOL = 4 mA

0.5

VOL

Low-level output voltage

1.8-V LVCMOS (XTL_OUT)

IOL = 0.75 mA

0.396

High-impedance output

IOZ

3.3-V TTL

current,

1.8-V LVCMOS (XTL_IN)

IIL

Low-level input current(1)

VI = VIL

3.3-V TTL

1.8-V LVCMOS (XTL_IN)

IIH

High-level input current(2)

VI = VIH

3.3-V TTL

DSP clock = 135 MHz,

LRCLKIN/LRCLKOUT = 48

IDVDD

Digital supply current

200

KHz,

XTALI = 24.288 MHz

DSP clock = 135 MHz,

LRCLKIN/LRCLKOUT = 48

IAVDD

Analog supply current

KHz,

XTALI = 24.288 MHz

IDVDD

Digital supply current

RESET = LOW

0.1

IAVDD

Analog supply current

RESET = LOW

(1)

Value given is for those input pins that connect to an internal pullup resistor as well as an input buffer. For inputs that have a pulldown

resistor or no resistor, IIL is 1 A.

(2)

Value given is for those input pins that connect to an internal pulldown resistor as well as an input buffer. For inputs that have a pullup

resistor or no resistor, IIH is 1 A.

over recommended operating conditions, see Figure 33

PARAMETER

MIN

TYP

MAX

UNIT

24.576

fXTALI

XTALI frequency (1/ tcyc1)

(1)

MHz

(512 Fs)

tcyc1

XTALI cycle time(2)

1/(512 Fs)

fMCLKIN

MCLKIN frequency (1/ tcyc2)

256 Fs

MHz

twMCLKIN

MCLKIN pulse duration(3)

0.4 tcyc2

0.6 tcyc2

fMCLKOUT

MCLKOUT frequency(1/ tcyc3)

256 Fs

MHz

trMCLKOUT

MCLKOUT rise time

CL = 30 pF

tfMCLKOUT

MCLKOUT fall time

CL = 30 pF

twMCLKOUT

MCLKOUT pulse duration(4)

0.4 tcyc3

0.6 tcyc3

XTALI master clock

MCLKOUT jitter

source

Delay time,

tdMIMO

MCLKIN rising edge to MCLKOUT rising MCLKOUT = MCLKIN

edge (5)

(1)

Frequency tolerance is 100 ppm (or better) at 25C.

(2)

tcyc1 = 1/ fXTALI

(3)

tcyc2 = 1/ fMCLKIN

(4)

tcyc3 = 1/ fMCLKOUT

(5)

When MCLKOUT is derived from MCLKIN, MCLKOUT jitter = MCLKIN jitter. MCLKOUT has the same duty cycle as MCLKIN when

MCLKOUT = MCLKIN.

Submit Documentation Feedback

Product Folder Link(s): TAS3218

TAS3218IPZP Datasheet(PDF) 45 Page - Texas Instruments

TAS3218IPZP Datasheet(HTML) 45 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79

Datasheet Download

Link URL