TAS3218IPZP datasheet(51/79 Pages) TI

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Master I2C Download Memory Block Structure

TAS3218

www.ti.com ....................................................................................................................................................................................................... SLES235 – JULY 2008

Table 10. 1 M8051 MCU Program RAM and External Data RAM Block Structure

STARTING

DATA BLOCK FORMAT

SIZE

VALUE

NOTES

BYTE

Checksum MSB

Checksum of byte 2

2 byte

through N + 12

Checksum LSB

Header ID byte 1

0x00

2 byte

Must be 0x001F

Header ID byte 2

0x1F

0x00 or

Micro program RAM or

Memory to be loaded

1 byte

0x01

micro external data RAM

0x00

1 byte

0x00

Unused

Start memory address MSB

If this is a termination

2 byte

header, this value is 0000

Start memory address LSB

Total number of byte transferred MSB

Header (12) + data (N) +

2 byte

checksum (4)

Total number of byte transferred LSB

0x00

1 byte

0x00

Unused

0x00

1 byte

0x00

Unused

Data byte 1 (LSB)

Data byte 2

4 byte

14 microprocessor byte

Data byte 3

Data byte 4 (MSB)

Data byte 5 (LSB)

Data byte 6

4 byte

58 microprocessor byte

Data byte 7

Data byte 8 (MSB)

0x00

Repeated checksum byte

N + 12

4 byte

2 through N +11

Checksum MSB

Checksum LSB

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