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AD5763CSUZ Datasheet(PDF) 23 Page - Analog Devices

Part # AD5763CSUZ
Description  Complete Dual, 16-Bit, High Accuracy, Serial Input, 짹5V DACs
PDF  31 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5763CSUZ Datasheet(HTML) 23 Page - Analog Devices

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Preliminary Technical Data
AD5763
Rev. PrA | Page 23 of 31
OFFSET AND GAIN ADJUSTMENT WORKED
EXAMPLE
Using the information provided in the previous section, the
following worked example demonstrates how the AD5763
functions can be used to eliminate both offset and gain errors.
As the AD5763 is factory calibrated, offset and gain errors
should be negligible. However, errors can be introduced by the
system that the AD5763 is operating within, for example, a
voltage reference value that is not equal to 2.048 V introduces a
gain error. An output range of ±4.096 V and twos complement
data coding is assumed.
Removing Offset Error
The AD5763 can eliminate an offset error in the range of −2 mV to
+1.98 mV with a step size of ⅛ of a 16-bit LSB.
Calculate the step size of the offset adjustment.
V
625
.
15
8
2
192
.
8
16
µ
=
×
=
Size
Step
Adjust
Offset
Measure the offset error by programming 0x0000 to the data
register and measuring the resulting output voltage, for this
example the measured value is 614 µV.
Calculate the number of offset adjustment steps that this value
represents.
Steps
Size
Step
Offset
Value
Offset
Measured
Steps
of
Number
40
V
625
.
15
V
614
=
=
=
µ
µ
The offset error measured is positive, therefore, a negative
adjustment of 40 steps is required. The offset register is 8 bits
wide and the coding is twos complement. The required offset
register value can be calculated as follows:
Convert adjustment value to binary: 00101000.
Convert this to a negative twos complement number by
inverting all bits and adding 1: 11011000.
11011000 is the value that should be programmed to the offset
register.
Note that this twos complement conversion is not necessary in
the case of a positive offset adjustment. The value to be
programmed to the offset register is simply the binary
representation of the adjustment value.
Removing Gain Error
The AD5763 can eliminate a gain error at negative full-scale
output in the range of −2 mV to +1.94 mV with a step size of ½
of a 16-bit LSB.
Calculate the step size of the gain adjustment.
V
5
.
62
2
2
192
.
8
16
µ
=
×
=
Size
Step
Adjust
Gain
Measure the gain error by programming 0x8000 to the data
register and measuring the resulting output voltage. The gain
error is the difference between this value and −4.096 V; for this
example, the gain error is −0.8 mV.
Calculate how many gain adjustment steps this value represents.
Steps
Size
Step
Gain
Value
Gain
Measured
Steps
of
Number
13
V
5
.
62
mV
8
.
0
=
=
=
µ
The gain error measured is negative (in terms of magnitude);
therefore, a positive adjustment of 13 steps is required. The gain
register is 6 bits wide and the coding is twos complement, the
required gain register value can be determined as follows:
Convert adjustment value to binary: 001101.
The value to be programmed to the gain register is simply this
binary number.



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