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TLV320ADC3101IRGER Datasheet(PDF) 47 Page - Texas Instruments |
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TLV320ADC3101IRGER Datasheet(HTML) 47 Page - Texas Instruments |
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47 / 84 page ![]() TLV320ADC3101 www.ti.com ........................................................................................................................................................................................... SLAS553 – NOVEMBER 2008 Page 0/Registers 23–24: Reserved Bit Reset Values Description Value D7–D0 X All values Reserved don't write to these registers. Page 0/Register 25: CLKOUT MUX Reset Values BIT DESCRIPTION Value D7–D3 0 All values Reserved don't write any value other than reset value. D2-D0 0 0 CDIV_CLKIN = MCLK (Device Pin) 1 CDIV_CLKIN = BCLK (Device Pin) 2 Reserved. Do not use. 3 CDIV_CLKIN = PLL_CLK (Generated On-Chip) 4 Reserved. Do not use. 5 Reserved. Do not use. 6 CDIV_CLKIN = ADC_CLK (Generated On-Chip) 7 CDIV_CLKIN = ADC_MOD_CLK (Generated On-Chip) Page 0/Register 26: CLKOUT M_VAL Reset Values BIT DESCRIPTION Value D7 0 0 CLKOUT M divider is powered down 1 CLKOUT M divider is powered up D6–D0 1 0 CLKOUT divider M = 128 1 CLKOUT divider M = 1 2 CLKOUT divider M = 2 126 CLKOUT divider M = 126 127 CLKOUT divider M = 127 Page 0/Register 27: ADC Interface Control1 Bit Reset Values Description Value D7–D6 0 0 ADC Interface = I2S 1 ADC Interface = DSP 2 ADC interface = RJF 3 ADC interface = LJF D5–D4 0 0 ADC interface word length = 16 bits 1 ADC interface word length = 20 bits 2 ADC interface word length = 24 bits 3 ADC interface word length = 32 bits D3 0 0 BCLK is Input 1 BCLK is Output D2 0 0 WCLK is Input 1 WCLK is Output D1 0 All values Reserved don't write any value other than reset value. D0 0 0 3-stating of DOUT: Disabled 1 3-stating of DOUT: Enabled Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 47 Product Folder Link(s) :TLV320ADC3101 |
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