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DS1875 Datasheet(PDF) 75 Page - Maxim Integrated Products |
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DS1875 Datasheet(HTML) 75 Page - Maxim Integrated Products |
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75 / 92 page ![]() Table 02h, Register B9h: FETG ENABLE0 FACTORY DEFAULT 00h READ ACCESS PW2 WRITE ACCESS PW2 MEMORY TYPE Nonvolatile (SEE) B9h TXP HI EN TXP LO EN BIAS HI EN BIAS MAX EN RESERVED RESERVED RESERVED RESERVED BIT 7 BIT 0 Configures the maskable interrupt for the FETG pin. BIT 7 TXP HI EN: Enables/disables active interrupts on the FETG pin due to TXP fast comparisons above the threshold limit. 0 = Disable (Default) 1 = Enable BIT 6 TXP LO EN: Enables/disables active interrupts on the FETG pin due to TXP fast comparisons below the threshold limit. 0 = Disable (Default) 1 = Enable BIT 5 BIAS HI EN: Enables/disables active interrupts on the FETG pin due to BIAS fast comparisons above the threshold limit. 0 = Disable. (Default) 1 = Enable BIT 4 BIAS MAX EN: Enables/disables active interrupts on the FETG pin due to BIAS fast comparison s below the threshold limit. 0 = Disable (Default) 1 = Enable BITS 3:0 RESERVED (Default = 0) PON Triplexer and SFP Controller ______________________________________________________________________________________ 75 |
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