LPC2220 datasheet(11/50 Pages) NXP

11 / 50 page

LPC2210_2220_6

Product data sheet

Rev. 06 — 11 December 2008

11 of 50

NXP Semiconductors

LPC2210/2220

16/32-bit ARM microcontrollers

P1.26/RTCK

52[5]

N6[5]

I/O

RTCK — Returned Test Clock output. Extra signal added to

the JTAG port. Assists debugger synchronization when

processor frequency varies. Bidirectional pin with internal

pull-up.

Note: LOW on this pin while RESET is LOW, enables pins

P1[31:26] to operate as Debug port after reset.

P1.27/TDO

144[5]

B2[5]

TDO — Test Data out for JTAG interface.

P1.28/TDI

140[5]

A3[5]

TDI — Test Data in for JTAG interface.

P1.29/TCK

126[5]

A7[5]

TCK — Test Clock for JTAG interface. This clock must be

slower than 1

⁄

6 of the CPU clock (CCLK) for the JTAG interface

to operate.

P1.30/TMS

113[5]

D10[5]

TMS — Test Mode Select for JTAG interface.

P1.31/TRST

43[5]

M4[5]

TRST — Test Reset for JTAG interface.

P2.0 to P2.31

I/O

Port 2 — Port 2 is a 32-bit bidirectional I/O port with individual

direction controls for each bit. The operation of port 2 pins

depends upon the pin function selected via the Pin Connect

Block.

P2.0/D0

98[5]

E12[5]

I/O

D0 — External memory data line 0.

P2.1/D1

105[5]

C12[5]

I/O

D1 — External memory data line 1.

P2.2/D2

106[5]

C11[5]

I/O

D2 — External memory data line 2.

P2.3/D3

108[5]

B12[5]

I/O

D3 — External memory data line 3.

P2.4/D4

109[5]

A13[5]

I/O

D4 — External memory data line 4.

P2.5/D5

114[5]

C10[5]

I/O

D5 — External memory data line 5.

P2.6/D6

115[5]

B10[5]

I/O

D6 — External memory data line 6.

P2.7/D7

116[5]

A10[5]

I/O

D7 — External memory data line 7.

P2.8/D8

117[5]

D9[5]

I/O

D8 — External memory data line 8.

P2.9/D9

118[5]

C9[5]

I/O

D9 — External memory data line 9.

P2.10/D10

120[5]

A9[5]

I/O

D10 — External memory data line 10.

P2.11/D11

124[5]

A8[5]

I/O

D11 — External memory data line 11.

P2.12/D12

125[5]

B7[5]

I/O

D12 — External memory data line 12.

P2.13/D13

127[5]

C7[5]

I/O

D13 — External memory data line 13.

P2.14/D14

129[5]

A6[5]

I/O

D14 — External memory data line 14.

P2.15/D15

130[5]

B6[5]

I/O

D15 — External memory data line 15.

P2.16/D16

131[5]

C6[5]

I/O

D16 — External memory data line 16.

P2.17/D17

132[5]

D6[5]

I/O

D17 — External memory data line 17.

P2.18/D18

133[5]

A5[5]

I/O

D18 — External memory data line 18.

P2.19/D19

134[5]

B5[5]

I/O

D19 — External memory data line 19.

P2.20/D20

136[5]

D5[5]

I/O

D20 — External memory data line 20.

P2.21/D21

137[5]

A4[5]

I/O

D21 — External memory data line 21.

P2.22/D22

1[5]

A1[5]

I/O

D22 — External memory data line 22.

P2.23/D23

10[5]

E3[5]

I/O

D23 — External memory data line 23.

P2.24/D24

11[5]

E2[5]

I/O

D24 — External memory data line 24.

P2.25/D25

12[5]

E1[5]

I/O

D25 — External memory data line 25.

Table 4.

Pin description …continued

Symbol

Pin (LQFP)

Pin (TFBGA) Type

Description

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