Features

– 5V Tolerant/Compliant (S) or 3V (R) Matrix Options

– CMOS, LVTTL, LVDS, PCI, USB, etc.

– Output Currents Programmable from 2 to 24 mA, by Step of 2 mA

– Cold Sparing Buffers (2 µA Max. Leakage Current at 3.6V Worst Case Mil Temp.)

- QML Q and V with SMD 5962-01B01

- ESCC QML with ESCC 9202 / 076

Description

The MH1RT Gate Array and Embedded Array families from Atmel are fabricated on a

radiation hardened 0.35 micron CMOS process, with up to 4 levels of metal for inter-

connect. This family features arrays with up to 1.6 million routable gates and 596

pads. The high density and high pin count capabilities of the MH1RT family, coupled

with the ability to embed cores or memories on the same silicon, make the MH1RT

series of arrays one of the best choices for System Level Integration.

The MH1RT series is supported by an advanced software environment based on

floor planning associated with timing driven layout provides an efficient back end

cycle.

The MH1RT series comes as a dual use of the MH1 series, adding:

the 300 Krad (Si) radiation level as required by most space programs.

- through cells relayout, an SEU built-in protection allowing to SEU harden only where

it is necessary with respect to function requirements

With a background of 15 years experience, the MH1RT series comes as the Atmel

7th generation of ASIC series designed for radiation hardened applications.

4110K–AERO–11/07

Rad Hard

1.6M Used

Gates 0.35 µm

CMOS Sea of

Gates/

Embedded

Array

MH1RT