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ACS8946 Datasheet(PDF) 22 Page - Semtech Corporation |
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ACS8946 Datasheet(HTML) 22 Page - Semtech Corporation |
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22 / 40 page ![]() ADVANCED COMMUNICATIONS FINAL DATASHEET Revision 3/November 2006 © Semtech Corp. Page 22 www.semtech.com ACS8946 JAM PLL Applications The ACS8946 is targeted at applications requiring clock cleaning, where input jitter is filtered out or attenuated at frequencies above the ACS8946 PLL bandwidth, and at those requiring protection switching. It also performs the function of a clock multiplying unit (CMU) translating from one common spot frequency to one of six spot frequencies (and/or odd divisions thereof) independently on each of its four outputs. The ACS8946 can save space when compared with discrete analog + VCXO solutions or module-based solutions. In the example in Figure 12 the ACS8946 is shown symbolically as a line card dejittering and clock multiplying device, providing additional jitter cleaning and frequency translation of the output clocks from a Semtech Line Card Protection device. Figure 13 shows a non-specific example schematic which represents a generic line card design, and demonstrates the I/O connections, configuration controls on the device and the appropriate terminations in different CML/LVPECL technologies, with only the parts relevant to the handling of clocks being shown. This example could be used as a solution for less stringent applications where the ACS8946 could carry out the basic clock protection function in place of a Semtech Line Card Protection device, although it could not, for example, perform group (Clock and Sync) switching, frequency monitoring, or other functions available with members of the Semtech LC/P family of parts. Application Diagram Figure 12 Typical Application for Semtech JAM PLLs Multiple Line cards Primary Ref. Input/ output Master Sync Card Slave Sync Card uP/Serial Bus SSM Priorities TCLK CLK SEC Master Clock DATA DATA Priorities Config. Input CLK Sources Line I/F Unit SetsLinecardGenApp_11 To/from SONET/SDH/PDH Network FRAMER SERDES Line Card (0C-12) Master Clock Recovered Clock Sync Slave Clock Backplane Low Jitter/Low Skew Low Jitter spot frequencies to 625.00 MHz Sync 4 x Programmable Clocks JAM PLL with PROTECTION SWITCH SETS Output CLKs ACS8946 ACS8510 ACS8520 ACS8522 ACS8530 Clock Distribution SSM Processing Slave Clock |
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