ATA5423-PLSW datasheet(59/100 Pages) ATMEL

59 / 100 page

4841D–WIRE–10/07

ATA5423/ATA5425/ATA5428/ATA5429

In the presence of a valid transmitter signal, T

Bit-check is dependent on the frequency of that sig-

nal, f

Signal, and the count of the bits, NBit-check. A higher value for NBit-check therefore results in a

longer period for T

Bit-check, requiring a higher value for the transmitter pre-burst, TPreburst.

9.1.7

Receiving Mode

If the bit check was successful for all bits specified by N

Bit-check, the transceiver switches to

receiving mode. To activate a connected microcontroller, the bits VSOUT_EN and CLK_ON in

control register 3 are set to “1”. An interrupt is issued at pin IRQ if the control bits T_MODE = 0

and P_MODE = 0.

If the transparent mode is active (T_MODE = 1) and the level on pin CS is low (no data transfer

via the serial interface), the RX data stream is available on pin SDO_TMDO (Figure 9-8).

Figure 9-8.

Receiving Mode (TMODE = 1)

If the transparent mode is inactive (T_MODE = 0), the received data stream is buffered in the

TX/RX data buffer (see Figure 9-9 on page 60). The TX/RX data buffer is only usable for

Manchester and Bi-phase coded signals. It is always possible to transfer the data from the data

buffer via the 4-wire serial interface to a microcontroller (see Figure 8-1 on page 49).

Buffering of the data stream:

After a successful bit check, the transceiver switches from bit-check mode to receiving mode. In

receiving mode the TX/RX data buffer control logic is active and examines the incoming data

stream. This is done, as in the bit check, by subsequent time frame checks where the distance

between two edges is continuously compared to a programmable time window as illustrated in

Figure 9-9 on page 60. Only two time differences between two edges in Manchester and

Bi-phase coded signals are valid (T and 2T).

The limits for T are the same as used for the bit check. They can be programmed in control

The limits for 2T are calculated as follows:

Lower limit of 2T:

Upper limit of 2T:

If the result of Lim_min_2T or Lim_max_2T is not an integer value, it will be rounded up.

SDO_TMDO

Demod_Out

Bit check ok

Preburst

Byte 2

Byte 1

Start

bit

'0' '0' '0' '0' '0' '0' '0' '0' '0' '1'

'1'

'0'

'0' '0' '0' '0' '0' '1' '1' '1' '1' '0'

'0' '1' '1' '0' '1' '0' '1' '1' '0' '0'

Bit-check mode

Receiving mode

Byte 3

Lim_min_2T

Lim_min

Lim_max

()

Lim_max

Lim_min

–

()/2

–

Lim_min_2T

XDCLK

Lim_max_2T

Lim_min

Lim_max

()

Lim_max

Lim_min

–

()/2

Lim_max_2T

Lim_max_2T - 1

() T

XDCLK

ATA5423-PLSW Datasheet(PDF) 59 Page - ATMEL Corporation

ATA5423-PLSW Datasheet(HTML) 59 Page - ATMEL Corporation

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