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LT1637CS8 Datasheet(PDF) 12 Page - Linear Technology |
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LT1637CS8 Datasheet(HTML) 12 Page - Linear Technology |
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12 / 16 page ![]() 12 LT1637 1637fd SCHE ATIC SI PLIFIED 7 V + 4 V – 6 OUT 8 1 NULL NULL 1637 SS 3 5 +IN –IN Q25 Q24 Q26 Q18 Q17 R6 7k R8 400 Ω R5 7k R3 1.3k R4 1.3k SHDN R7 400 Ω Q16 Q15 Q10 Q11 Q9 Q8 Q14 Q2 D5 Q13 Q1 10 µA Q20 Q23 D3 Q7 D1 D2 D4 Q6 Q4 Q5 2 R2 6k R1 1M Q3 Q19 Q21 Q22 Q12 APPLICATIO S I FOR ATIO Gain The open-loop gain is less sensitive to load resistance when the output is sourcing current. This optimizes per- formance in single supply applications where the load is returned to ground. The typical performance photo of Open-Loop Gain for various loads shows the details. Shutdown The LT1637 can be shut down two ways: using the shutdown pin or bringing V+ to within 0.5V of V–. When V+ is brought to within 0.5V of V– both the supply current and output leakage current drop to less than 10nA. When the shutdown pin is brought 1.2V above V –, the supply current drops to about 3 µA and the output leakage current is less than 1 µA,independentofV+.Ineithercasetheinput bias current is less than 0.1nA (even if the inputs are 44V above the negative supply). Figure 1. Input Offset Nulling LT1637 10k 1637 F01 V – 1 8 The shutdown pin can be taken up to 32V above V –. The shutdown pin can be driven below V –, however the pin current through the substrate diode should be limited with an external resistor to less than 10mA. Input Offset Nulling The input offset voltage can be nulled by placing a 10k potentiometer between Pins 1 and 8 with its wiper to V– (see Figure 1). The null range will be at least ±3mV. |
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