STC4130 datasheet(2/44 Pages) CONNOR-WINFIELD

2 / 44 page

Data Sheet #: TM084

Page 2 of 44

Rev: P02

Date: 12/5/06

STC4130

Synchronous Clock for SETS

Data Sheet

Table of Contents

Description 1

Features 1

STC4130 Pin Diagram (Top View) 3

STC4130 Pin Description 4

Absolute Maximum Ratings 6

Operating Conditions and Electrical Characteristics 6

General Description 9

Detailed Description 10

Chip Master Clock Input 10

Reference Input Monitoring and Qualification 10

DPLL Active Reference Selection 11

Manual Reference Selection Mode 11

Automatic Reference Selection Mode 11

Digital Phase Locked Loop General Description 11

Free Run 12

Synchronized 12

Holdover 12

DPLL Operating Mode Details 12

Free Run Mode 12

Holdover Mode 13

Output Clocks 14

Master/Slave Operation 15

Processor Interface Descriptions 17

SPI Bus Mode 17

Serial Bus Timing 18

Motorola Bus 19

Intel Bus 21

Multiplex Bus Mode 24

General Register Operation 26

Multibyte register reads 26

Multibyte register writes 26

Clearing bits in the Interrupt Status Register 26

Default Register Settings 26

Application Notes 40

Mechanical Dimensions 42

Ordering Information 42

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