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LT3518

3518fb

OPERATION

The LT3518 is a constant frequency, current mode regula-

tor with an internal power switch. Operation can be best

understood by referring to the Block Diagram in Figure 1. At

the start of each oscillator cycle, the SR latch is set, which

turns on the Q1 power switch. A voltage proportional to

the switch current is added to a stabilizing ramp and the

resulting sum is fed into the positive terminal of the PWM

comparator, A4. When this voltage exceeds the level at the

negative input of A4, the SR latch is reset, turning off the

power switch. The level at the negative input of A4 is set

by the error ampliﬁer A3. A3 has two inputs, one from the

voltage feedback loop and the other one from the current

loop. Whichever feedback input is lower takes precedence,

and forces the converter into either constant-current or

constant-voltage mode. The LT3518 is designed to transi-

tion cleanly between these two modes of operation. The

current sense ampliﬁer senses the voltage across RSENSE

and provides a pre-gain to ampliﬁer A1. The output of A1

is simply an ampliﬁed version of the difference between

the voltage across RSENSE and the lower of VCTRL/10

or 100mV. In this manner, the error ampliﬁer sets the

correct peak switch current level to regulate the current

through RSENSE. If the error ampliﬁer’s output increases,

more current is delivered to the output; if it decreases,

less current is delivered. The current regulated in RSENSE

can be adjusted by changing the input voltage VCTRL.

The current sense ampliﬁer provides rail-to-rail current

sense operation. The FB voltage loop is implemented by

the ampliﬁer A2. When the voltage loop dominates, the

error ampliﬁer and the ampliﬁer A2 regulate the FB pin to

1.01V (constant-voltage mode).

Dimming of the LED array is accomplished by pulsing the

LED current using the PWM pin. When the PWM pin is

low, switching is disabled and the error ampliﬁer is turned

off so that it does not drive the VC pin. Also, all internal

loads on the VC pin are disabled so that the charge state

of the VC pin will be saved on the external compensation

capacitor. This feature reduces transient recovery time.

When the PWM input again transitions high, the demand

current for the switch returns to the value just before

PWM last transitioned low. To further reduce transient

recovery time, an external PMOS is used to disconnect

the LED array current loop when PWM is low, stopping

CFILT from discharging.

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