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LT3587

3587fc

PIN FUNCTIONS

VOUT1 (Pin 14): Boost1 Output Pin. This pin is the drain

of an output disconnect PMOS transistor.

FB1 (Pin 15): Boost1 Output Voltage Feedback Pin. Con-

nect a resistor RFB1 from this pin to VOUT1 (or CAP1)

such that:

RFB1 = ((VVOUT1/1.22V) – 1) • 88.5k

There is an internal 88.5k resistor from the FB1 pin to

ground.

EN/SS1 (Pin 16): Boost1/Inverter Shutdown and Soft-Start

Pin. Boost1 and Inverter are enabled when the voltage

on this pin is greater than 2.5V. They are disabled when

the voltage is below 0.2V. An internal 1μA current source

in conjunction with an external capacitor can be used to

ramp this pin and provide soft-start.

VIN (Pin 17): Input Supply Pin. Must be locally bypassed

with an X5R or X7R type ceramic capacitor.

EN/SS3 (Pin 18): Boost3 Shutdown and Soft-Start Pin.

Boost3 is enabled when the voltage on this pin is greater

than 2V. It is disabled when the voltage is below 0.2V. An

internal 1μA current source in conjunction with an exter-

nal capacitor can be used to ramp this pin and provide

soft-start.

IFB3 (Pin 19): Boost3 Output Current Programming Pin.

Connect a resistor RIFB3 from this pin to ground such

that:

RIFB3 = 200 • (0.8V/IVOUT3)

If Boost3 output is conﬁgured as a voltage regulator,

RIFB3 can be optionally used to limit the maximum output

current to ILIMIT:

RIFB3 = 200 • (0.8V/ILIMIT)

Note: Tie IFB3 to GND when no current limit is desired.

VFB3 (Pin 20): Boost3 Output Voltage Feedback Pin. Con-

nect a resistor RVFB3 from this pin to VOUT3 (or CAP3)

such that:

RVFB3 = ((VVOUT3/0.8V) – 1) • 56.3k

There is an internal 56.3k resistor from the VFB3 pin to

ground. In the current regulator conﬁguration, RVFB3 can

be optionally used to limit the maximum output voltage

to VCLAMP, such that:

RVFB3 = ((VCLAMP/0.8V) – 1) • 56.3k

Note: When no voltage clamp is desired in the current

regulator conﬁguration, tie VFB3 to GND.

Exposed Pad (Pin 21): Ground Pin. Connect to PCB ground

plane. Ground plane connection through multiple vias under

the package is recommended for optimum electrical and

thermal performance.

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