LTC1696

7

PI FU CTIO S

FB1 (Pin 1): First Feedback Input. FB1 monitors and

senses the first supply output voltage through an external

resistor divider. This voltage is then compared with an

internal reference voltage of 0.88V, which sets the thresh-

old for an overvoltage fault detection. If the sense voltage

exceeds the threshold level, the output response time at

the OUT pin is dependent on the feedback overdrive above

the threshold level. The higher the feedback overdrive, the

faster will be the response time.

GND (Pin 2): Power Ground. Return path for all device

currents.

rately from the power supply output that the chip is

monitoring. Its input range is from 2.7V to 27V. The

quiescent current is typically 100

µA in standby mode

when the device is operating at 5V. The quiescent current

increases to 170

µA when operating at 12V.

OUT (Pin 4): Output Current Limit Driver. Capable of

delivering continuous current, typically 80mA, at high

supplies. The output current decreases with lower supply

voltage. This pin directly drives the SCR crowbar at high

supply voltage. It can also provide gate drive for an

N-channel MOSFET or the base of an NPN transistor,

which drives the gate of an external SCR at low supply

voltage. It is normally in the inactive low state in the

standby mode. In the event of an overvoltage fault condi-

tion, the OUT pin is latched into the active high state. The

latched active high state is reset by pulling the TIMER/

RESET pin low through an N-channel MOSFET switch or if

age lockout threshold voltage of 1.94V.

FB2 (Pin 5): Second Feedback Input. FB2 monitors and

senses the second supply output voltage through an

external resistor divider. This voltage is then compared

with an internal reference voltage of 0.88V, which sets the

threshold for an overvoltage fault detection. If the sense

voltage exceeds the threshold level, the output response

time at the OUT pin is dependent on the feedback overdrive

above the threshold level. The higher the feedback over-

drive, the faster will be the response time.

TIMER/RESET (Pin 6): Glitch Filter Timer Capacitor, Reset

and External Trigger Input. The external capacitor con-

nected to this pin programs the internal glitch filter time

delay. The internal current source used to charge the timer

capacitor is typically 10

µA with feedback overdrive of less

than 20mV above the feedback trip threshold from one

feedback input. The current source increases to 12

µA

when the feedback overdrive increases to more than

100mV. It further increases to 18

µA if larger overdrive

occurs from both feedback inputs. The default glitch filter

time delay without an external timer capacitor is fixed by

an internal capacitor of 5pF with the internal reference

voltage of 1.185V. The delay reduces with increases in first

and second feedback input overdrive. This pin also serves

as a reset input to clear the internal latch during an

overvoltage fault condition. If pulled low, it resets the

active high state of the internal latch. The reset signal to

this pin should be an open drain type. This pin can also be

driven high externally to activate the OUT pin active high

if the FB1 and FB2 voltages remain below the feedback trip

threshold.