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80C52 Datasheet(PDF) 8 Page - TEMIC Semiconductors |
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80C52 Datasheet(HTML) 8 Page - TEMIC Semiconductors |
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8 / 54 page  8 Rev. B - Jan. 25, 1999 Preliminary TS80C52X2 Figure 2. Mode Switching Waveforms The X2 bit in the CKCON register (See Table 4.) allows to switch from 12 clock cycles per instruction to 6 clock cycles and vice versa. At reset, the standard speed is activated (STD mode). Setting this bit activates the X2 feature (X2 mode). CAUTION In order to prevent any incorrect operation while operating in X2 mode, user must be aware that all peripherals using clock frequency as time reference (UART, timers) will have their time reference divided by two. For example a free running timer generating an interrupt every 20 ms will then generate an interrupt every 10 ms. UART with 4800 baud rate will have 9600 baud rate. XTAL1:2 XTAL1 CPU clock X2 bit X2 Mode STD Mode STD Mode |
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