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80C52 Datasheet(PDF) 17 Page - TEMIC Semiconductors |
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80C52 Datasheet(HTML) 17 Page - TEMIC Semiconductors |
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17 / 54 page  Rev. B - Jan. 25, 1999 17 Preliminary TS80C52X2 Table 7. T2MOD Register T2MOD - Timer 2 Mode Control Register (C9h) Reset Value = XXXX XX00b Not bit addressable 7 6 5 4 3 2 1 0 - - - - - - T2OE DCEN Bit Number Bit Mnemonic Description 7 - Reserved The value read from this bit is indeterminate. Do not set this bit. 6 - Reserved The value read from this bit is indeterminate. Do not set this bit. 5 - Reserved The value read from this bit is indeterminate. Do not set this bit. 4 - Reserved The value read from this bit is indeterminate. Do not set this bit. 3 - Reserved The value read from this bit is indeterminate. Do not set this bit. 2 - Reserved The value read from this bit is indeterminate. Do not set this bit. 1 T2OE Timer 2 Output Enable bit Clear to program P1.0/T2 as clock input or I/O port. Set to program P1.0/T2 as clock output. 0 DCEN Down Counter Enable bit Clear to disable timer 2 as up/down counter. Set to enable timer 2 as up/down counter. |
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