LTC2446 datasheet(7/28 Pages) LINER

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LTC2446/LTC2447

24467fa

TEST CIRCUITS

FU CTIO AL BLOCK DIAGRA

Figure 1. Functional Block Diagram

APPLICATIO S I FOR ATIO

CONVERTER OPERATION

Converter Operation Cycle

The LTC2446/LTC2447 are multichannel, multireference

high speed, delta-sigma analog-to-digital converters with

an easy to use 3- or 4-wire serial interface (see Figure 1).

Their operation is made up of three states. The converter

operating cycle begins with the conversion, followed by

the low power sleep state and ends with the data output/

input (see Figure 2). The 4-wire interface consists of serial

data input (SDI), serial data output (SDO), serial clock

(SCK) and chip select (CS). The interface, timing, opera-

tion cycle and data out format is compatible with Linear’s

entire family of

∆Σconverters.

Initially, the LTC2446/LTC2447 perform a conversion.

Once the conversion is complete, the device enters the

Figure 2. LTC2446/LTC2447 State Transition Diagram

AUTOCALIBRATION

AND CONTROL

DIFFERENTIAL

3RD ORDER

∆Σ MODULATOR

DECIMATING FIR

ADDRESS

INTERNAL

OSCILLATOR

SERIAL

INTERFACE

GND

VCC

CH0

CH1

•

CH7

COM

IN+

REF+

REF–

IN–

SDO

SCK

VREFG

–

VREF67

–

VREF01

–

SDI

(INT/EXT)

24467 F01

CONVERT

SLEEP

YES

CHANNEL SELECT

REFERENCE SELECT

SPEED SELECT

DATA OUTPUT

POWER UP

IN+=CH0, IN–=CH1

REF+ = VREFO1

REF– = VREF01

–

OSR=256,1X MODE

24467 F02

CS = LOW

AND

SCK

1.69k

SDO

24467 TA03

Hi-Z TO VOH

VOL TO VOH

VOH TO Hi-Z

CLOAD = 20pF

1.69k

SDO

24467 TA04

Hi-Z TO VOL

VOH TO VOL

VOL TO Hi-Z

CLOAD = 20pF

VCC

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