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LTC2485

2485fa

Discarding a Conversion Result and Initiating a New

Conversion with Optional Configuration Updating

At the conclusion of a conversion cycle, a Write cycle can

be initiated. Once the Write cycle is acknowledged, a stop

(P) command initiates a new conversion. If a new con-

figuration is required, this data can be written into the

device and a stop command initiates a new conversion,

see Figure 8.

Synchronizing Multiple LTC2485s with the Global

Address Call

In applications where several LTC2485s are used on the

same I2C bus, all LTC2485s can be synchronized with the

global address call. To achieve this, first all the LTC2485s

must have completed the conversion cycle. The master

issues a Start, followed by the LTC2485 global address

1110111 and a Write request. All LTC2485s will be se-

lected and acknowledge the request. The master then

sends the write byte (Optional) and ends the Write opera-

tion with a STOP. This will update the configuration

registers (if a write byte was sent) and initiate a new

conversion simultaneously on all the LTC2485s, as shown

in Figure 9. In order to synchronize the start of conversion

without affecting the configuration registers, the Write

operation can be aborted with a STOP. This initiates a new

conversion on all the LTC2485s without changing the

configuration registers.

Easy Drive Input Current Cancellation

The LTC2485 combines a high precision delta-sigma ADC

with an automatic differential input current cancellation

front end. A proprietary front-end passive sampling

network transparently removes the differential input cur-

rent. This enables external RC networks and high imped-

ance sensors to directly interface to the LTC2485 without

external amplifiers. The remaining common mode input

current is eliminated by either balancing the differential

input impedances or setting the common mode input

equal to the common mode reference (see Automatic

Input Current Cancellation section). This unique architec-

ture does not require on-chip buffers enabling input

signals to swing all the way to ground and up to VCC.

Furthermore, the cancellation does not interfere with the

transparent offset and full-scale auto-calibration and the

absolute accuracy (full scale + offset + linearity) is main-

tained even with external RC networks.

Conversion Clock

A major advantage the delta-sigma converter offers over

conventional type converters is an on-chip digital filter

(commonly implemented as a SINC or Comb filter). For high

resolution, low frequency applications, this filter is typically

designed to reject line frequencies of 50Hz or 60Hz plus their

harmonics. The filter rejection performance is directly re-

lated to the accuracy of the converter system clock. The

Figure 8. Start a New Conversion without Reading Old Conversion Result

Figure 9. Synchronize the LTC2485s with the Global Address Call

7-BIT ADDRESS

CONVERSION

SLEEP

DATA INPUT

W ACK

WRITE (OPTIONAL)

2485 F08

GLOBAL ADDRESS

SCL

SDA

LTC2485

…

LTC2485

ALL LTC2485s IN SLEEP

CONVERSION OF ALL LTC2485s

DATA INPUT

W ACK

WRITE (OPTIONAL)

2485 F09

APPLICATIO S I FOR ATIO

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