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LTC2485 Datasheet(PDF) 23 Page - Linear Technology

Part # LTC2485
Description  24-Bit ?誇 ADC with Easy Drive Input Current Cancellation and I2C Interface
PDF  40 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC2485 Datasheet(HTML) 23 Page - Linear Technology

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LTC2485
2485fa
voltage). Table 6 summarizes the effects of mismatched
source impedance and differences in reference/input com-
mon mode voltages.
Table 6. Suggested Input Configuration for LTC2485
BALANCED INPUT
UNBALANCED INPUT
RESISTANCES
RESISTANCES
Constant
CEXT > 1nF at Both
CEXT > 1nF at Both IN+
VIN(CM) – VREF(CM)
IN+ and IN–. Can Take
and IN–. Can Take Large
Large Source Resistance
Source Resistance.
with Negligible Error
Unbalanced Resistance
Results in an Offset
Which Can be Calibrated
Varying
CEXT > 1nF at Both IN+
Minimize IN+ and IN–
VIN(CM) – VREF(CM)
and IN–. Can Take Large
Capacitors and Avoid
Source Resistance with
Large Source Impedance
Negligible Error
(< 5k Recommended)
The magnitude of the dynamic input current depends upon
the size of the very stable internal sampling capacitors and
upon the accuracy of the converter sampling clock. The
accuracy of the internal clock over the entire temperature
and power supply range is typically better than 0.5%. Such
a specification can also be easily achieved by an external
clock. When relatively stable resistors (50ppm/
°C) are
used for the external source impedance seen by IN+ and
IN–, the expected drift of the dynamic current and offset
will be insignificant (about 1% of their respective values
over the entire temperature and voltage range). Even for
the most stringent applications, a one-time calibration
operation may be sufficient.
In addition to the input sampling charge, the input ESD
protection diodes have a temperature dependent leakage
current. This current, nominally 1nA (
±10nA max), results
in a small offset shift. A 1k source resistance will create a
1
µV typical and 10µV maximum offset voltage.
Figure 13. An RC Network at IN+ and IN–
Figure 14. +FS Error vs RSOURCE at IN+ and IN–
Figure 15. –FS Error vs RSOURCE at IN+ and IN–
CEXT
2485 F13
VINCM + 0.5VIN
RSOURCE
IN+
LTC2485
CPAR
≅20pF
CEXT
VINCM – 0.5VIN
RSOURCE
IN –
CPAR
≅20pF
RSOURCE (Ω)
1
–20
0
20
1k
100k
2485 F14
–40
–60
–80
10
100
10k
40
60
80
VCC = 5V
VREF = 5V
VIN
+ = 3.75V
VIN
– = 1.25V
TA = 25°C
CEXT = 0pF
CEXT = 100pF
CEXT = 1nF, 0.1µF, 1µF
RSOURCE (Ω)
1
–20
0
20
1k
100k
2485 F15
–40
–60
–80
10
100
10k
40
60
80
VCC = 5V
VREF = 5V
VIN
+ = 1.25V
VIN
– = 3.75V
TA = 25°C
CEXT = 0pF
CEXT = 100pF
CEXT = 1nF, 0.1µF, 1µF
APPLICATIO S I FOR ATIO



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