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LTC3201 Datasheet(PDF) 7 Page - Linear Technology |
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LTC3201 Datasheet(HTML) 7 Page - Linear Technology |
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7 / 8 page ![]() LTC3201 7 3201f appropriate to compare the achievable capacitance for a given case size rather than discussing the specified ca- pacitance value. For example, over the rated voltage and temperature, a 1 µF,10V,Y5Vceramiccapacitorinan0603 case may not provide any more capacitance than a 0.22 µF 10V X7R available in the same 0603 case. The capacitor manufacturer’s data sheet should be consulted to deter- mine what value of capacitor is needed to ensure 0.22 µF at all temperatures and voltages. Below is a list of ceramic capacitor manufacturers and how to contact them: AVX (843) 448-9411 www.avxcorp.com Kemet (864) 963-6300 www.kemet.com Murata (770) 436-1300 www.murata.com Taiyo Yuden (800) 348-2496 www.t-yuden.com Vishay (610) 644-1300 www.vishay.com Open-Loop Output Impedance The theoretical minimum open-loop output impedance of a voltage doubling charge pump is given by: R VV IFC OUT MIN IN OUT OUT () – == 21 where F if the switching frequency (1.8MHz typ) and C is the value of the flying capacitor. (Using units of MHz and µF is convenient since they cancel each other). Note that the charge pump will typically be weaker than the theoreti- cal limit due to additional switch resistance. Under normal operation, however, with VOUT ≈ 4V, IOUT < 100mA, VIN > 3V, the output impedance is given by the closed-loop value of ~0.5 Ω. Output Ripple The value of COUT directly controls the amount of ripple for a given load current. Increasing the size of COUT will reduce the output ripple at the expense of higher minimum turn- on time and higher start-up current. The peak-to-peak output ripple is approximated by the expression: V I FC RIPPLE P P OUT OUT () • − ≅ 2 F is the switching frequency (1.8MHz typ). Loop Stability Both the style and the value of COUT can affect the stability of the LTC3201. The device uses a closed loop to adjust the strength of the charge pump to match the required output current. The error signal of this loop is directly stored on the output capacitor. The output capacitor also serves to form the dominant pole of the loop. To prevent ringing or instability, it is important for the output capaci- tor to maintain at least 0.47 µF over all ambient and operating conditions. Excessive ESR on the output capacitor will degrade the loop stability of the LTC3201. The closed loop DC imped- ance is nominally 0.5 Ω. The output will thus change by 50mV with a 100mA load. Output capacitors with ESR of 0.3 Ω or greater could cause instability or poor transient response. To avoid these problems, ceramic capacitors should be used. A tight board layout with good ground plane is also recommended. Soft-Start The LTC3201 has built-in soft-start circuitry to prevent excessive input current flow at VIN during start-up. The soft-start time is programmed at approximately 30 µs. Layout Considerations Due to the high switching frequency and large transient currents produced by the LTC3201, careful board layout is necessary. A true ground plane is a must. To minimize high frequency input noise ripple, it is especially important that the filter capacitor be placed with the shortest dis- tance to the LTC3201 (1/8 inch or less). The filter capacitor should have the highest possible resonant frequency. Conversely, the input capacitor does not need to be placed close to the pin. The input capacitor serves to cancel out the lower frequency input noise ripple. Extra inductance on the VIN line actually helps input current ripple. Note that if the VIN trace is lengthened to add parasitic inductance, it starts to look like an antenna and worsen the radiated noise. It is recommended that the filter capacitor be placed on the left hand side next to Pin 3. The flying capacitor can then be placed on the top of the device. It is also important APPLICATIO S I FOR ATIO Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. |
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