LTC3201

5

3201f

APPLICATIO S I FOR ATIO

Operation (Refer to Simplified Block Diagram)

The LTC3201 is a switched capacitor boost charge pump

especially designed to drive white LEDs in backlighting

applications. The LTC3201’s internal regulation loop

maintains constant LED output current by monitoring the

voltage at the FB pin. The device has a novel internal filter

that, along with an external 0.22

µF capacitor, significantly

reduces input current ripple. An internal 7-state DAC

allows the user to lower the regulation voltage at the FB

pin, thus lowering the LED current. To regulate the output

current, the user places a sense resistor between FB and

The value at the FB pin is then compared to the output of

the DAC. The charge pump output voltage is then changed

to equalize the DAC output and the FB pin. The value of the

sense resistor determines the maximum value of the

output current.

When the charge pump is enabled, a two-phase

nonoverlapping clock activates the charge pump switches.

clock. On phase two of the clock, it is stacked in series with

discharging the flying capacitor continues at a free run-

ning frequency of 1.8MHz (typ) until the FB pin voltage

reaches the value of the DAC.

In shutdown mode all circuitry is turned off and the

LTC3201 draws only leakage current (<1

LTC3201 is in shutdown when a logic low is applied to all

shutdown current will increase to 10

µA max. In normal

operation, the quiescent supply current of the LTC3201

will be slightly higher if any of the D0:D2 pins is driven high

inputs, they should never be allowed to float.

Input Current Ripple

The LTC3201 is designed to minimize the current ripple at

phase 2 of the clocking. If there is a large nonoverlap time

can go down to zero during this time. At the full load of

100mA at the output, this means that the input could

potentially go from 200mA down to 0mA during the

nonoverlap time. The LTC3201 mitigates this problem by

minimizing the nonoverlap time, using a high (1.8MHz)

frequency clock, and employing a novel noise FILTER

network. The noise filter consists of internal circuitry plus

capacitor serves to cancel the higher frequency compo-

lower frequency components. The recommended values

are 0.22

capacitor. Note that these capacitors must be of the highest

possible resonant frequencies. See Layout Considerations.

3-Bit DAC for Output Current Control

Digital pins D0, D1, D2 are used to control the output

connected between FB and ground. Due to the finite

transconductance of the regulation loop, for a given diode

setting, the voltage at the FB Pin will decrease as output

current increases. All LEDs subsequently connected in

parallel should then have similar currents. The mismatch-

resistors will cause a differential current error between

LEDs connected to the same output. Once the sense

resistor is selected, the user can then control the voltage

applied across that resistor by changing the digital values

at D0:D2. This in turn controls the current into the LED.

Note that there are only 7 available current states. The 8th

is reserved to shutdown. This is the all 0s code. Refer to

Table below.

D0

D1

D2

FB

HIGH

HIGH

HIGH

0.63V

HIGH

HIGH

LOW

0.54V

HIGH

LOW

HIGH

0.45V

HIGH

LOW

LOW

0.36V

LOW

HIGH

HIGH

0.27V

LOW

HIGH

LOW

0.18V

LOW

LOW

HIGH

0.09V

LOW

LOW

LOW

Shutdown