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LTC3499 Datasheet(PDF) 6 Page - Linear Technology |
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LTC3499 Datasheet(HTML) 6 Page - Linear Technology |
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6 / 16 page ![]() LTC3499/LTC3499B 3499f 6 PI FU CTIO S SHDN (Pin 1): Shutdown Input for IC. Connect to a voltage greater than 1.2V to enable and a voltage less than 0.2V to disable the LTC3499/LTC3499B. VIN (Pin 2): Input Supply Voltage. The valid operating voltage is between 1.8V to 5.5V. VIN has reverse battery protection. Since the LTC3499/LTC3499B use VIN as the main bias source, bypass with a low ESR ceramic capaci- tor of at least 2.2 µF. SW (Pin 3): Switch Pin. Connect an inductor from VIN to this pin with a value between 2.2 µH and 10µH. Keep PCB trace lengths as short and wide as possible to minimize EMI and voltage overshoot. If the inductor current falls to zero or SHDN is low an internal 250 Ω antiringing switch is connected from VIN to SW to minimize EMI. GND (Pin 4): Signal and Power Ground for the IC. SS (Pin 5): Soft-Start Input. Connect a capacitor from SS to ground to control the inrush current at start-up. An internal 3 µA current source charges this pin. SS will be discharged if SHDN is pulled low, thermal shutdown occurs or VIN is below the minimum operating voltage. VOUT (Pin 6): Power Supply Output. Connect a low ESR output filter capacitor from this pin to the ground plane. FB (Pin 7): FB Input to Error Amplifier. Connect a resistor divider tap from VOUT to this pin to set the output voltage. The output voltage can be adjusted between 2V and 6V. Referring to the Functional Block Diagram, the output voltage is given by: V R R OUT =+ ⎛ ⎝⎜ ⎞ ⎠⎟ ⎡ ⎣ ⎢ ⎤ ⎦ ⎥ 122 1 1 2 .• VC (Pin 8): Error Amplifier Output. A frequency compen- sation network is connected from this pin to GND to compensate the boost converter loop. See Closing the Feedthrough Loop section for guidelines. Exposed Pad—DD Only (Pin 9): Ground. Must be sol- dered to the PCB power ground plane for electrical con- nection and rated thermal performance. |
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