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LTC3862

3862fb

OPERATION

Table 1

PHASEMODE

CH-1 to CH-2

PHASE

CH-1 to CLKOUT

PHASE

APPLICATION

SGND

180°

90°

2-Phase, 4-Phase

Float

180°

60°

6-Phase

3V8

120°

240°

3-Phase

Using the LTC3862 Transconductance (gm) Error

Ampliﬁer in Multi-Phase Applications

The LTC3862 error ampliﬁer is a transconductance, or gm

ampliﬁer, meaning that it has high DC gain but high output

impedance (the output of the error ampliﬁer is a current

proportional to the differential input voltage). This style

of error ampliﬁer greatly eases the task of implementing

a multi-phase solution, because the ampliﬁers from two

or more chips can be connected in parallel. In this case

the FB pins of multiple LTC3862s can be connected to-

gether, as well as the ITH pins, as shown in Figure 8. The

gm of the composite error ampliﬁer is simply n times the

transconductance of one ampliﬁer, or gm(TOT) = n • 660μS,

where n is the number of ampliﬁers connected in paral-

lel. The transfer function from the ITH pin to the current

comparator inputs was carefully designed to be accurate,

both from channel-to-channel and chip-to-chip. This way

the peak inductor current matching is kept accurate.

A buffered version of the output of the error ampliﬁer

determines the threshold at the input of the current com-

parator. The ITH voltage that represents zero peak current

is 0.4V and the voltage that represents current limit is

1.2V (at low duty cycle). During an overload condition, the

output of the error ampliﬁer is clamped to 2.6V at low duty

cycle, in order to reduce the latency when the overload

condition terminates. A patented circuit in the LTC3862 is

used to recover the slope compensation signal, so that the

maximum peak inductor current is not a strong function

of the duty cycle.

Soft-Start

The start-up of the LTC3862 is controlled by the voltage on

the SS pin. An internal PNP transistor clamps the current

comparator sense threshold during soft-start, thereby

limiting the peak switch current. The base of the PNP is

connected to the SS pin and the emitter to an internal,

FREQ

CLKOUT

SYNC

PLLFLTR

LTC3862

MASTER

SGND

ITH

VOUT

INTVCC

RUN

ON/OFF

CONTROL

ALL RUN PINS

CONNNECTED

TOGETHER

INDIVIDUAL

INTVCC PINS

LOCALLY

DECOUPLED

FREQ

CLKOUT

SYNC

PLLFLTR

LTC3862

SLAVE

SGND

ITH

INTVCC

RUN

SLAVE

3862 F08

ALL SS PINS

CONNNECTED

TOGETHER

FREQ

ALL FB PINS

CONNECTED

TOGETHER

ALL ITH PINS

CONNECTED

TOGETHER

CLKOUT

SYNC

PLLFLTR

LTC3862

SGND

ITH

INTVCC

RUN

Figure 8. LTC3862 Error Ampliﬁer Conﬁguration

for Multi-Phase Operation

buffered ITH node (please note that the ITH pin voltage may

not track the soft-start voltage during this time period).

An internal 5μA current source charges the SS capacitor,

and clamps the peak sense threshold until the voltage on

the soft-start capacitor reaches approximately 0.6V. The

required amount of soft-start capacitance can be estimated

using the following equation:

CμA

⎛

⎝⎜

⎞

⎠⎟

The SS pin has an internal open-drain NMOS pull-down

transistor that turns on when the RUN pin is pulled low,

when the voltage on the INTVCCpinisbelowitsundervoltage

lockout threshold, or during an overtemperature condi-

tion. In multi-phase applications that use more than one

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