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LTC4081

4081f

OPERATIO

Constant-Frequency (PWM) Mode Operation

The switching regulator operates in constant-frequency

(PWM) mode when the MODE pin is pulled below VIL. In

this mode, it uses a current mode architecture including

an oscillator, an error ampliﬁer, and a PWM comparator

for excellent line and load regulation. The main switch

MP2 (P-channel MOSFET) turns on to charge the inductor

at the beginning of each clock cycle if the FB pin voltage

is less than the 0.8V reference voltage. The current into

the inductor (and the load) increases until it reaches the

peak current demanded by the error amp. At this point,

the main switch turns off and the synchronous switch

MN1 (N-channel MOSFET) turns on allowing the inductor

current to ﬂow from ground to the load until either the

next clock cycle begins or the current reduces to the zero

current (IZERO) level.

Oscillator: In constant-frequency mode, the switching

regulator uses a dedicated oscillator which runs at a ﬁxed

frequency of 2.25MHz. This frequency is chosen to mini-

mize possible interference with the AM radio band.

Error Ampliﬁer: The error ampliﬁer is an internally com-

pensated transconductance (gm) ampliﬁer with a gm

of 65 μmhos. The internal 0.8V reference voltage is

compared to the voltage at the FB pin to generate a

current signal at the output of the error ampliﬁer. This cur-

rent signal represents the peak inductor current required

to achieve regulation.

PWM Comparator: Lossless current sensing converts

the PMOS switch current signal to a voltage which is

summed with the internal slope compensation signal.

The PWM comparator compares this summed signal to

determine when to turn off the main switch. The switch

current sensing is blanked for ~12ns at the beginning of

each clock cycle to prevent false switch turn-off.

Burst Mode Operation

Burst Mode operation can be selected by pulling the

MODE pin above VIH. In this mode, the internal oscil-

lator is disabled, the error ampliﬁer is converted into a

comparator monitoring the FB voltage, and the inductor

current swings between a ﬁxed IPEAK (~100mA) and IZERO

(35mA) irrespective of the load current as long as the FB

pin voltage is less than or equal to the reference voltage

of 0.8V. Once VFB is greater than 0.8V, the control logic

shuts off both switches along with most of the circuitry

and the regulator is said to enter into SLEEP mode. In

SLEEP mode, the regulator only draws about 20μA from

the BAT pin provided that the battery charger is turned

off. When the output voltage droops about 1% from its

nominal value, the regulator wakes up and the inductor

current resumes swinging between IPEAK and IZERO. The

output capacitor recharges and causes the regulator to

re-enter the SLEEP state if the output load remains light

enough. The frequency of this intermittent burst operation

depends on the load current. That is, as the load current

drops further, the regulator turns on less frequently. Thus

Burst Mode operation increases the efﬁciency at light loads

by minimizing the switching and quiescent losses. However,

the output voltage ripple increases to about 2%.

To minimize ripple in the output voltage, the current limits

for both switches in Burst Mode operation are reduced

to about 20% of their values in the constant-frequency

mode. Also the zero current of the synchronous switch

is changed to about 35mA thereby preventing reverse

conduction through the inductor. Consequently, the regu-

lator can only deliver approximately 67mA of load current

while in Burst Mode operation. Any attempt to draw more

load current will cause the output voltage to drop out of

regulation.

Current Limit

To prevent inductor current runaway, there are absolute

current limits (ILIM) on both the PMOS main switch and

the NMOS synchronous switch. These limits are internally

set at 520mA and 700mA respectively for PWM mode. If

the peak inductor current demanded by the error ampliﬁer

ever exceeds the PMOS ILIM, the error ampliﬁer will be

ignored and the inductor current will be limited to PMOS

ILIM. In Burst Mode operation, the PMOS current limit is

reduced to 100mA to minimize output voltage ripple.

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