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BQ4285EP Datasheet(PDF) 1 Page - Texas Instruments |
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BQ4285EP Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 32 page  Features ® Direct clock/calendar replace- ment for IBM ® AT-compatible computers and other applications ® 114 bytes of general nonvolatile storage ® Enhanced features include: - System wake-up capability— alarm interrupt output active in battery-backup mode - 2.7–3.6V operation (bq4285L); 4.5–5.5V operation (bq4285E) - 32kHz output for power management ® Automatic backup and write- protect control to external SRAM ® Functionally compatible with the DS1285 ® Less than 0.5 µA load under bat- tery operation ® 14 bytes for clock/calendar and control ® BCD or binary format for clock and calendar data ® Calendar in day of the week, day of the month, months, and years, with automatic leap-year adjust- ment ® Time of day in seconds, minutes, and hours - 12- or 24-hour format - Optional daylight saving adjustment ® Programmable square wave out- put ® Three individually maskable in- terrupt event flags: - Periodic rates from 122µs to 500ms - Time-of-day alarm once per second to once per day - End-of-clock update cycle ® 24-pin plastic DIP or SOIC General Description The CMOS bq4285E/L is a low-power microprocessor peripheral providing a time-of-day clock and 100-year calen- dar with alarm features and battery operation. Other features include three maskable interrupt sources, square wave output, and 114 bytes of general nonvolatile storage. A 32.768kHz output is available for sustaining power-management activi- ties. Wake-up capability is provided by an alarm interrupt, which is active in battery-backup mode. The bq4285E/L write-protects the clock, calendar, and storage registers during power failure. A backup bat- tery then maintains data and oper- ates the clock and calendar. The bq4285E/L is a fully compatible real-time clock for IBM AT- compatible computers and other ap- plications. The only external compo- nents are a 32.768kHz crystal and a backup battery. The bq4285E/L integrates a battery-backup controller to make a 1 28-Pin PLCC: No Longer Available Pin Names AD0–AD7 Multiplexed address/data input/output MOT Bus type select input CS Chip select input AS Address strobe input DS Data strobe input R/W Read/write input INT Interrupt request output RST Reset input SQW Square wave output BC 3V backup cell input X1–X2 Crystal inputs NC No connect CEIN RAM chip enable input CEOUT RAM chip enable output VOUT Supply output VCC +5V supply bq4285E/L 1 PN428501.eps 24-Pin DIP or SOIC 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 9 10 16 15 11 12 14 13 VCC SQW CEOUT BC INT RST DS VSS R/W AS CS VOUT X1 X2 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 VSS CEIN Pin Connections Enhanced RTC With NVRAM Control SLUS006A - MAY 1994 - REVISED MAY 2004 |
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