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LTC2232 Datasheet(PDF) 1 Page - Linear Technology |
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LTC2232 Datasheet(HTML) 1 Page - Linear Technology |
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1 / 28 page ![]() LTC2232/LTC2233 1 22323fa FEATURES DESCRIPTIO APPLICATIO S TYPICAL APPLICATIO ■ Sample Rate: 105Msps/80Msps ■ 61dB SNR up to 140MHz Input ■ 75dB SFDR up to 200MHz Input ■ 775MHz Full Power Bandwidth S/H ■ Single 3.3V Supply ■ Low Power Dissipation: 475mW/366mW ■ Selectable Input Ranges: ±0.5V or ±1V ■ No Missing Codes ■ Optional Clock Duty Cycle Stabilizer ■ Shutdown and Nap Modes ■ Data Ready Output Clock ■ Pin Compatible Family 135Msps: LTC2224 (12-Bit), LTC2234 (10-Bit) 105Msps: LTC2222 (12-Bit), LTC2232 (10-Bit) 80Msps: LTC2223 (12-Bit), LTC2233 (10-Bit) ■ 48-Pin 7mm x 7mm QFN Package 10-Bit,105Msps/ 80Msps ADCs The LTC ®2232 and LTC2233 are 105Msps/80Msps, sam- pling 10-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. The LTC2232/ LTC2233 are perfect for demanding communications applications with AC performance that includes 61dB SNR and 75dB spurious free dynamic range for signals up to 200MHz. Ultralow jitter of 0.15psRMS allows undersampling of IF frequencies with excellent noise performance. DC specs include ±0.15LSB INL (typ), ±0.1LSB DNL (typ) and ±0.8LSB INL, ±0.6LSB DNL over temperature. The transition noise is a low 0.12LSBRMS. A separate output power supply allows the outputs to drive 0.5V to 3.6V logic. The ENC+ and ENC– inputs may be driven differentially or single ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. ■ Wireless and Wired Broadband Communication ■ Cable Head-End Systems ■ Power Amplifier Linearization ■ Communications Test Equipment – + INPUT S/H CORRECTION LOGIC OUTPUT DRIVERS 10-BIT PIPELINED ADC CORE CLOCK/DUTY CYCLE CONTROL FLEXIBLE REFERENCE D9 • • • D0 ENCODE INPUT REFH REFL ANALOG INPUT 22323 TA01 0.5V TO 3.6V OVDD OGND VDD 3.3V INPUT FREQUENCY (MHz) 0 90 85 80 75 70 65 60 55 50 100 200 300 400 22323 TA01b 500 600 4th OR HIGHER 2nd OR 3rd SFDR vs Input Frequency , LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. |
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