TLV5613 datasheet(2/21 Pages) TI

2 / 21 page

TLV5613

2.7 V TO 5.5 V 12-BIT PARALLEL DIGITAL-TO-ANALOG CONVERTER

WITH POWER DOWN

SLAS174A – DECEMBER 1997 – REVISED JULY 1998

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

functional block diagram

Interface

Control

4-Bit

DAC MSW

Holding

Latch

A(0–1)

OUT

Power-On

Reset

3-Bit

Control

Latch

Powerdown

and Speed

Control

12-Bit

DAC

Latch

REF

LDAC

8-Bit

DAC LSW

Holding

Latch

D(0–7)

PWD

SPD

Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

AVDD

Analog positive power supply

Address input

Chip select. Digital input active low, used to enable/disable inputs

DVDD

Digital positive power supply

D0 (LSB) – D7 (MSB)

1–6, 19, 20

Data input

LDAC

Load DAC. Digital input active low, used to load DAC output

OUT

DAC analog voltage output

PWD

Power down. Digital input active low

REF

Analog reference voltage input

SPD

Speed select. Digital input

GND

Ground

Write enable. Digital input active low, used to latch data

TLV5613 Datasheet(PDF) 2 Page - Texas Instruments

TLV5613 Datasheet(HTML) 2 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

Datasheet Download

Link URL