TSB41LV04APFP datasheet(13/49 Pages) TI

13 / 49 page

TSB41LV04A

IEEE 1394a FOUR-PORT CABLE TRANSCEIVER/ARBITER

SLLS379 – OCTOBER 1999

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

electrical characteristics over recommended ranges of operating conditions (unless otherwise

noted) (continued)

device

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNIT

See Note 3

205

IDD

Supply current

See Note 4

151

See Note 5

125

ICC–ULP

Supply current – ultra low power mode

VCC = 3.3 V,

TA = 25°C,

Ports disabled, PD = 0 V,

LPS = 0 V

150

µA

VTH

Power status threshold, CPS input†

400-k

Ω resistor†

4.7

7.5

High level output voltage CTL0 CTL1

VDD = 2.7 V,

IOH = –4 mA

2.2

VOH

High-level output voltage, CTL0, CTL1,

D0–D7, DNA, C/LKON, SYSCLK outputs

VDD = 3 V to 3.6 V,

IOH = –4 mA

2.8

VOL

Low-level output voltage, CTL0, CTL1,

D0–D7, DNA, C/LKON, SYSCLK outputs

IOL = 4 mA

0.4

VOH-AJ

High-level Annex J output voltage, CTL0,

CTL1, D0–D7, DNA, C/LKON, SYSCLK

outputs

Annex J; IOH = –9 mA,

ISO = 0 V,

VDD_5V = VDD,

VDD ≥ 3 V

VDD–0.4

VOL-AJ

Low-level Annex J output voltage, CTL0,

CTL1, D0–D7, DNA, C/LKON, SYSCLK

outputs

Annex J; IOL = 9 mA,

ISO = 0 V,

VDD_5V = VDD,

VDD ≥ 3 V

0.4

IBH+

Positive peak bus holder current

(D0 – D7, CTL0, CTL1, LREQ)

ISO = 3.6 V, VDD = 3.6 V,

VI 0VtoVDD

0.05

IBH–

Negative peak bus holder current

(D0 – D7, CTL0, CTL1, LREQ, LPS, PD)

VI = 0 V to VDD,

VDD_5V = VDD

–1

–0.05

Input current, LREQ, LPS, PD, TESTM,

SE, SM, PC0–PC2 inputs

ISO = 0 V, VDD 3.6 V

µA

IOZ

Off-state output current, CTL0, CTL1,

D0–D7, C/LKON I/Os

VO= VDD or 0 V

±5

µA

IIRST

Pullup current, RESET input

VI = 1.5 V or 0 V

–90

–20

µA

ISE-PU

Pullup current, SE input

VI = 1.5 V or 0 V

–50

–5

µA

VIT

Positive input threshold voltage, LREQ,

CTL0, CTL1, D0–D7 inputs‡

ISO = 0 V ,VDD_5V = VDD

VDD/2+0.3

VDD/2+0.9

VIT+

Positive input threshold voltage, LPS

inputs

ISO = 0 V, VDD_5V = VDD,

Vref = VDD × 0.42

Vref+1

VIT

Negative input threshold voltage, LREQ,

CTL0, CTL1, D0–D7 inputs‡

ISO = 0 V,VDD_5V = VDD

VDD/2–0.9

VDD/2–0.3

VIT–

Negative input threshold voltage, LPS

inputs

ISO = 0 V, VDD_5V = VDD,

Vref = VDD × 0.42

Vref+0.2

TPBIAS output voltage

At rated IO current

1.665

2.015

† Measured at cable power side of resistor.

‡ This parameter applicable only when ISO low.

NOTES:

3. Transmit Max Packet (4 ports transmitting maximum size isochronous packets – 4096 bytes, sent on every isochronous internal,

S400, data value of 0xCCC CCCCh), VDD = 3.3 V, TA = 25°C.

4. Repeat Typical Packet (1 port receiving DV packets on every isochronous interval, 3 ports repeating the packet S100),

VDD = 3.3 V, TA = 25°C.

5. Idle (4 ports transmitting cycle starts), VDD = 3.3 V, TA = 25°C.

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