TSB41LV04APFP datasheet(3/49 Pages) TI

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TSB41LV04A

IEEE 1394a FOUR-PORT CABLE TRANSCEIVER/ARBITER

SLLS379 – OCTOBER 1999

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

description (continued)

The TSB41LV04A provides a 1.86 V nominal bias voltage at the TPBIAS terminal for port termination. The PHY

contains four independent TPBIAS circuits. This bias voltage, when seen through a cable by a remote receiver,

indicates the presence of an active connection. This bias voltage source must be stabilized by an external filter

capacitor of 1.0

µF.

The line drivers in the TSB41LV04A operate in a high-impedance current mode, and are designed to work with

external 112-

Ω line-termination resistor networks in order to match the 110-Ω cable impedance. One network

is provided at each end of a twisted-pair cable. Each network is composed of a pair of series-connected 56-

Ω

resistors. The midpoint of the pair of resistors that is directly connected to the twisted-pair-A terminals is

connected to its corresponding TPBIAS voltage terminal. The midpoint of the pair of resistors that is directly

connected to the twisted-pair-B terminals is coupled to ground through a parallel R-C network with

recommended values of 5 k

Ω and 220 pF. The values of the external line termination resistors are designed

to meet the standard specifications when connected in parallel with the internal receiver circuits. An external

resistor connected between the R0 and R1 terminals sets the driver output current, along with other internal

operating currents. This current setting resistor has a value of 6.3-k

Ω ±1%. This may be accomplished by

placing a 6.34-k

Ω ±1% resistor in parallel with a 1-MΩ resistor.

When the power supply of the TSB41LV04A is off while the twisted-pair cables are connected, the TSB41LV04A

transmitter and receiver circuitry will present a high impedance to the cable and will not load the TPBIAS voltage

at the other end of the cable.

When the TSB41LV04A is used with one or more of the ports not brought out to a connector, the twisted-pair

terminals of the unused ports must be terminated for reliable operation. For each unused port, the TPB+ and

TPB– terminals should be tied together and then pulled to ground, or the TPB+ and TPB– terminals should be

connected to the suggested termination network. The TPA+ and TPA– and TPBIAS terminals of an unused port

may be left unconnected. The TPBIAS terminal should be connected to a 1

µF capacitor to ground or left

floating.

The TESTM, SE, and SM terminals are used to set up various manufacturing test conditions. For normal

operation, the TESTM terminal should be connected to VDD, SE should be tied to ground through a 1-kΩ resistor,

while SM should be connected directly to ground.

Four package terminals are used as inputs to set the default value for four configuration status bits in the self-ID

packet, and are hardwired high or low as a function of the equipment design. The PC0–PC2 terminals are used

to indicate the default power-class status for the node (the need for power from the cable or the ability to supply

power to the cable). See Table 9 for power-class encoding. The C/LKON terminal is used as an input to indicate

that the node is a contender for either isochronous resource manager (IRM) or bus manager (BM).

The TSB41LV04A supports suspend/resume as defined in the IEEE P1394a specification. The suspend

mechanism allows pairs of directly-connected ports to be placed into a low power conservation state

(suspended state) while maintaining a port-to-port connection between bus segments. While in the suspended

state, a port is unable to transmit or receive data transaction packets. However, a port in the suspended state

is capable of detecting connection status changes and detecting incoming TPBias. When all four ports of the

TSB41LV04A are suspended all circuits except the bandgap reference generator and bias detection circuits are

powered down resulting in significant power savings. For additional details of suspend/resume operation refer

to the P1394a specification. The use of suspend/resume is recommended for new designs.

The port transmitter and receiver circuitry is disabled during power-down (when the PD input terminal is

asserted high), during reset (when the RESET input terminal is asserted low), when no active cable is connected

to the port, or when controlled by the internal arbitration logic. The TPBias output is disabled during power-down,

during reset, or when the port is disabled as commanded by the LLC.

TSB41LV04APFP Datasheet(PDF) 3 Page - Texas Instruments

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