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LTC3554

3554f

OPERATION

The power dissipated by a step-down switching regulator

can be estimated as follows:

PD(SWx) = (BOUTx • IOUT) • (100 - Eff)/100

Where BOUTx is the programmed output voltage, IOUT is

the load current and Eff is the % efﬁciency which can

be measured or looked up on an efﬁciency table for the

programmed output voltage.

Thus the power dissipated by all regulators is:

PD(REGS) = PD(SW1) + PD(SW2)

It is not necessary to perform any worst-case power dis-

sipation scenarios because the LTC3554 will automatically

reduce the charge current to maintain the die temperature

at approximately 110°C. However, the approximate ambi-

ent temperature at which the thermal feedback begins to

protect the IC is:

TA = 110°C – PD • θJA

Example: Consider the LTC3554 operating from a wall

adapter with 5V (VBUS) providing 400mA (IBAT) to charge a

Li-Ion battery at 3.3V (BAT). Also assume PD(REGS) = 0.3W,

so the total power dissipation is:

PD = (5V – 3.3V) • 400mA + 0.3W = 0.98W

The ambient temperature above which the LTC3554 will

begin to reduce the 400mA charge current, is approxi-

mately:

TA = 110°C – 0.98W • 70°C/W = 41.4°C

The LTC3554 can be used above 41.4°C, but the charge

current will be reduced below 400mA. The charge current at

a given ambient temperature can be approximated by:

PD = (110°C – TA) / θJA = (VBUS – BAT) • IBAT + PD(REGS)

Thus:

IBAT = [(110°C – TA) / θJA - PD(REGS)]

(VBUS – BAT)

Consider the above example with an ambient tempera-

ture of 60°C. The charge current will be reduced to

approximately:

IBAT = [(110°C - 60°C) / 70°C/W - 0.3W]/(5V – 3.3V)

IBAT = (0.71W - 0.3W) / 1.7V = 241mA

Printed Circuit Board Layout

When laying out the printed circuit board, the following

list should be followed to ensure proper operation of the

LTC3554:

1. The Exposed Pad of the package (Pin 21) should con-

nect directly to a large ground plane to minimize thermal

and electrical impedance.

2. The trace to the step-down switching regulator input

supply pin (BVIN) and its decoupling capacitor should be

kept as short as possible. The GND side of this capacitor

should connect directly to the ground plane of the part.

This capacitor provides the AC current to the internal

power MOSFETs and their drivers. It is important to

minimize inductance from this capacitor to the pin of

the LTC3554. Connect BVIN to VOUT through a short

low impedance trace.

3. The switching power traces connecting SW1, and SW2

to their respective inductors should be minimized to

reduce radiated EMI and parasitic coupling. Due to the

large voltage swing of the switching nodes, sensitive

nodes such as the feedback nodes (FB1 and FB2) should

be kept far away or shielded from the switching nodes

or poor performance could result.

4. Connections between the step-down switching regu-

lator inductors and their respective output capacitors

should be kept as short as possible. The GND side of

the output capacitors should connect directly to the

thermal ground plane of the part.

5. Keep the buck feedback pin traces (FB1, and FB2) as

short as possible. Minimize any parasitic capacitance

between the feedback traces and any switching node

(i.e., SW1, SW2 and logic signals). If necessary, shield

the feedback nodes with a GND trace.

6. Connections between the LTC3554 PowerPath pins

(VBUS and VOUT) and their respective decoupling ca-

pacitors should be kept as short as possible. The GND

side of these capacitors should connect directly to the

ground plane of the part.

LTC3554 Datasheet(PDF) 32 Page - Linear Technology

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