8

UCC1921

UCC2921

UCC3921

Current Source Load:

T

CV

II

START

OUT

SS

MAX

LOAD

=

•

−

Resistive Load:

T

CR

n

IR

IR

V

START

OUT

OUT

MAX

OUT

MAX

OUT

SS

=

••

•

•−

















l

UCC3921 must be addressed and component values de-

rived. Assuming the user chooses to limit the maximum

allowable average power that will be associated with the

hot swap power manager, the power limiting resistor,

R

Pavg

AI

PL

FET

MAX

=

•

1µ

defined by

R

V

mA

PL

SS

min =

5

(Refer to Figure 5).

Finally, after computing the aforementioned variables, the

minimum timing capacitor can be derived as such:

Current Source Load:

()

C

TA R

V

V

R

T

START

PL

SS

PL

min =

••

•

+

−

•

372

10

10

µ

Resistive Load:

()

C

TA R

V

V I

R

R

R

T

START

PL

SS

MAX

OUT

PL

O

min =

••

•

+

−

−

•

•

+

•

336

5

5

3

µ

UT

SS

OUT

PL

VC

R

••

•

5

Level Shift Circuitry to Interface with SDFLTCH

Some type of circuit is needed to interface with the

UCC3921 via SDFLTCH, such as opto-couplers or level

shift circuitry. Figure 6 depicts one implementation of

level shift circuitry that could be used, showing compo-

nent values selected for a typical –48V telecommunica-

tions

application.

There

are

three

communication

conditions which could occur; two of which are Hot Swap

Power Manager (HSPM) state output indications, and the

third being an External Shutdown.

1) When open, and under a non-fault condition,

SDFLTCH is pulled to a low state. In Figure 6, the N-

channel

level

shift

transistor

is

off,

and

the

FAULT OUT signal is pulled to LOCAL VDD through

R3. This indicates that the HSPM is not faulted.

2) When a fault is detected by the fault timer or under-

voltage lockout, this pin will drive to a high state, indi-

cating that the external power FET is off. In Figure 6,

the N-channel level shift transistor will conduct, and

the FAULT OUT signal will be pulled to a Schottky Di-

ode voltage drop below LOCAL GND. This indicates

that the HSPM is faulted. The Schottky Diode is nec-

essary to ensure that the FAULT OUT signal does

not traverse too far below LOCAL GND, making fault

detection difficult.

APPLICATION INFORMATION (continued)

25

22.5

20

17.5

15

12.5

10

7.5

5

2.5

0

0

25

50

75 100 125 150 175 200

R

R

PL

PL

=500k

=200k

∞

I= 4A

MAX

=

∞

Figure 5. Plot Average Power vs FET Voltage for

Increasing Values of R

PL

Figure 6. Possible Level Shift Circuitry to

Interface to the UCC3921, showing component

values selected for a typical telecom application.

UDG-96279

=

∞