TMC2242A datasheet(11/16 Pages) CADEKA

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TMC2242A/TMC2242B

PRODUCT SPECIFICATION

Timing Diagrams (continued)

Figure 9. Threshold Levels for Three State Measurements

65-2242A-11

tENA

2.0V

0.8V

tDIS

Three-State

Outputs

High Impedance

0.5V

Applications Discussion

The TMC2242A and TMC2242B are well-suited for ﬁltering

digitized composite NTSC or PAL video. In Figure 10, the

TMC1175A 8-bit video A/D converter outputs, D7-0, are

connected to the TMC2242B inputs, SI11-4, respectively

(grounding SI3-0). The RND2-0 controls are set to 111 for a

9-bit rounded decimated output on SO15-7.

In Figure 11, the TMC2242B drives a fast D/A converter to

reconstruct analog composite video. The TMC3003 10-bit

digital-to-analog converter inputs, D9-0 are connected to the

TMC2242B outputs SO15-6, respectively. The TMC2242B

RND2-0 controls are set to 110 for rounded 10-bit interpola-

tion operation.

Figure 10. Decimating Oversampled Video With a Low Cost 8-bit A/D

Note: Data buses are unsigned binarys; TMC2242 input is two’s complement.

Figure 11. Interpolating Digital Video Signals before Reconstruction

Composite

Video

75 Ohm

TMC1175A

8-bit A/D

65-2242A-12

TTL Clock

28.636 MHz (NTSC D2)

300 pF

510 pF

2 uH

300 pF

75 Ohm

D6-0

TMC2242B

SO14-7

SI10-4

AGND

VIN

27.000 MHz (D1)

28.636 MHz (NTSC D2)

27.000 MHz (D1)

SI11

SO15

14.318 MHz (NTSC D2)

13.500 MHz (D1)

TCO=INT=1

DEC=0

MSB

Composite

Video

75 Ohm

TMC3003

10-bit D/A

300 pF

510 pF

2 uH

300 pF

75 Ohm

D8-0

TMC2242B

SO14-6

SO15

SI10-0

SI11

11 LSB

MSB

AGND

IOUT

TTL Clock

28.636 MHz (NTSC D2)

27.000 MHz (D1)

28.636 MHz (NTSC D2)

27.000 MHz (D1)

14.318 MHz (NTSC D2)

13.500 MHz (D1)

TCO=1 INT=DEC=0

65-2242A-13

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