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13

Channel Selection

Each channel selected contains an SD_ and SC_ pair.

Select a channel by writing a control byte after a success-

ful acknowledge of the slave address. The last 4 bits of the

control byte determine which channel(s) is selected for the

MAX7367/MAX7368 as shown in Table 1. The last 3 bits of

the control byte determine which channel is selected for

the MAX7369 as shown in Table 2. The selected channels

are activated after the stop condition. When a channel is

selected, the respective SD_/SC_ pair is logic-high, ensur-

ing no false conditions occur on the bus.

Interrupt Logic (MAX7367/MAX7369)

The MAX7367/MAX7369 have four interrupt inputs, one for

each channel, and one

INT output. The INT output is an

open-drain output that requires a pullup resistor. The

INT

output is asserted by a low-logic signal on any of the

INT_

inputs, and it is deasserted only when all the

INT_ inputs

are logic-high. Bits 4–7 of the MAX7367/MAX7369

control/interrupt register store the state of the

INT_ for

each channel as shown in Table 3 and Figures 6 and 8.

The logic level of

INT_ is not latched. Drive the respective

INT_ input high to remove the interrupt condition for the

channel. An interrupt can occur on any channel, regard-

less of whether it is selected or not selected.

After a device generates an interrupt on one of the

channels, the interrupt input is loaded into the

control/interrupt register when a read is performed. To

determine which device is generating the interrupt,

read the contents of the control/interrupt register to

determine which channel is issuing the interrupt, then

write the appropriate command to the control/interrupt

register to select the interrupted channel. Read from all

devices on the interrupted channel to determine the

exact source of the interrupt.

Table 1. MAX7367/MAX7368 Control Bits

for Channel Selection

CONTROL BIT

COMMAND

B0

0 = Channel 0 disabled (default)

1 = Channel 0 enabled

B1

0 = Channel 1 disabled (default)

1 = Channel 1 enabled

B2

0 = Channel 2 disabled (default)

1 = Channel 2 enabled

B3

0 = Channel 3 disabled (default)

1 = Channel 3 enabled

Table 2. MAX7369 Control Bits for

Channel Selection

B2

B1

B0

COMMAND

0

0

0

No channel selected (default)

0

X

X

No channel selected

1

0

0

Channel 0 selected

1

0

1

Channel 1 selected

1

1

0

Channel 2 selected

1

1

1

Channel 3 selected

Table 3. MAX7367/MAX7369 Interrupt

Indicator Bits

INTERRUPT BIT

STATE

INT0

0 = No channel 0 interrupt (default)

1 = Channel 0 interrupt

INT1

0 = No channel 1 interrupt (default)

1 = Channel 1 interrupt

INT2

0 = No channel 2 interrupt (default)

1 = Channel 2 interrupt

INT3

0 = No channel 3 interrupt (default)

1 = Channel 3 interrupt

7

X

X = DON'T CARE.

X

X

X

B3

B2

B1

B0

65

4

32

1

0

CHANNEL 0

CHANNEL SELECTION BITS

(READ/WRITE)

CHANNEL 1

CHANNEL 2

CHANNEL 3

Figure 7. MAX7368 Control Register

7

INT3

INT2

INT1

INT0

X

B2

B1

B0

65

4

32

1

0

CHANNEL SELECTION BITS

(READ/WRITE)

INTERRUPT BITS

(READ ONLY)

ENABLE BIT

X = DON'T CARE.

Figure 8. MAX7369 Control/Interrupt Register