Full Bridge DC Motor Driver

SPF7302

11

OCL deactivated

OCP activated

3 A (typ.) current limit

DI

DLY

INx

DI

OUTx

2.5 μs

INx

DIAG

OUTx

DIAG

DIAG (high)

Normal Operation

At Open Load

A

A

A

Open load detection during normal operation of the IC is done

by checking the negative potential of the output.

Referring to figure 6, during normal operation, recirculation

current causes the output to be below GND. The IC checks the

output voltage during 2.5 μs typical, just after the falling edge

of the corresponding IN signal, and if it does not detect the

negative potential, DIAG is asserted after the 2.5 μs detection

period. During the 2.5 μs period, the DIAG pin is set to high

because the internal circuit is reset during that period (see the

arrows marked A in figure 6).

Open load detection operates differently during startup of the

IC. The overcurrent limitation deactivated period occurs imme-

diately after DI is asserted. Therefore, in order to repeat OCL

deactivation, recycle DI.

During this period, overcurrent protection (OCP) is still active.

(With regard to OCL delay, see also note 2 to the Electrical

Characteristics table.)

Figure 6. Open load detection in normal operation

Figure 7. DLY pin effect at startup

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com