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TLP2116 Datasheet(PDF) 4 Page - Toshiba Semiconductor |
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TLP2116 Datasheet(HTML) 4 Page - Toshiba Semiconductor |
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4 / 6 page ![]() TLP2116 2008-06-11 4 Switching Characteristics (Unless otherwise specified, Ta = -40 to 100℃, VCC = 4.5 to 5.5V)(Each Channel) Characteristic Symbol Test Circuit Conditions Min Typ. Max Unit Propagation delay time to logic low output tpHL IF = 0→12 mA - - 75 ns Propagation delay time to logic high output tpLH 1 IF = 12→0 mA RIN = 100 Ω CL = 15 pF (Note 5) - - 75 ns Propagation delay time to logic low output tpHL VIN = 0→5 V (IF = 0→8 mA) - - 75 ns Propagation delay time to logic high output tpLH 2 VIN = 5→0 V (IF = 8→0 mA) RIN = 430 Ω CIN = 27 pF CL = 15 pF (Note 5) - - 75 ns Switching time dispersion between ON and OFF |tpHL- tpLH| IF = 12 mA RIN =100 Ω, CL =15 pF (Note 5) - - 30 ns Output fall time (90 - 10%) tf IF = 0→12 mA — 15 — ns Output rise time (10 - 90%) tr 1 IF = 12→0 mA RIN =100 Ω CL =15 pF (Note 5) — 15 — ns Common mode transient immunity at high level output CMH VCM =1000 Vp-p , IF = 0 mA, VO (min) = 4 V , Ta = 25°C 10000 - - V/ μs Common mode transient immunity at low level output CML 3 VCM = 1000 Vp-p , IF = 12 mA, VO (max) = 0.4 V , Ta = 25°C -10000 - - V/ μs *All typical values are at Ta=25 °C Note 5: CL is approximately 15 pF which includes probe and Jig/stray wiring capacitance. |
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