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PCF2119AU/2DA/2 Datasheet(PDF) 39 Page - NXP Semiconductors |
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PCF2119AU/2DA/2 Datasheet(HTML) 39 Page - NXP Semiconductors |
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39 / 79 page ![]() PCF2119X_5 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 13 August 2009 39 of 79 NXP Semiconductors PCF2119x LCD controllers/drivers 11. Basic architecture 11.1 Parallel interface The PCF2119x can send data in either two 4-bit operations or one 8-bit operation and can thus interface to 4-bit or 8-bit microcontrollers. In 8-bit mode data is transferred as 8-bit bytes using the 8 ports DB7 to DB0. Three further control lines E, RS and R/W are required. In 4-bit mode data is transferred in two cycles of 4 bits each using ports DB7 to DB4 for the transaction. The higher order bits (corresponding to range of bit 7 to bit 4 in 8-bit mode) are sent in the first cycle and the lower order bits (bit 3 to bit 0 in 8-bit mode) in the second cycle. Data transfer is complete after two 4-bit data transfers. It should be noted that two cycles are also required for the busy flag check. 4-bit operation is selected by instruction (see Figure 23 to Figure 25 for examples of bus protocol). In 4-bit mode, ports DB3 to DB0 must be left open-circuit. They are pulled up to VDD internally. Fig 23. 4-bit transfer example mga804 RS E DB7 R/W DB6 DB5 DB4 instruction write busy flag and address counter read data register read IR7 IR3 BF AC3 DR7 DR3 IR6 IR2 AC6 AC2 DR6 DR2 IR5 IR1 AC5 AC1 DR5 DR1 IR4 IR0 AC4 AC0 DR4 DR0 |
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