PCF2119AUSLASH2DASLASH2 datasheet(8/79 Pages) NXP

8 / 79 page

PCF2119X_5

Product data sheet

Rev. 05 — 13 August 2009

8 of 79

NXP Semiconductors

PCF2119x

LCD controllers/drivers

[1]

The Busy Flag (BF) indicates the busy state (bit BF = 1) until initialization ends. The busy state lasts 2 ms. The chip may also be

initialized by software (see Table 43 and Table 44).

8.3 Power-down mode

The chip can be put into power-down mode by applying a HIGH-level to pin PD. In

power-down mode all static currents are switched off (no internal oscillator, no bias level

generation and all LCD outputs are internally connected to VSS).

During power-down, information in the RAMs and the chip state are preserved. Instruction

execution during power-down is possible when pin OSC is externally clocked.

8.4 LCD supply voltage generator

The LCD supply voltage may be generated on-chip. The VLCD generator is controlled by

two internal 6-bit registers: VA and VB. Register VA is programmed with the voltage for

character mode and register VB with the voltage for icon mode.

The nominal LCD operating voltage at room temperature is given by Equation 2:

(2)

Where Vx is the integer value of the register VA or VB.

It should be noted that VLCD is sometimes referred as the LCD operating voltage (Voper).

Table 4.

State after reset

Step Function

Control bit and

Description

Reference

Clear_display

Table 16

Entry_mode_set

bit I_D = 1

incremental cursor move direction

Table 18

bit S = 0

no display shift

Display_ctl

bit D = 0

display off

Table 19

bit C = 0

cursor off

bit B = 0

cursor character blink off

Function_set

bit DL = 1

8-bit interface

Table 12

bit M = 0

1-line display

bit SL = 0

1:18 multiplex drive mode

bit H = 0

normal instruction set

default address pointer to DDRAM [1]

Table 22

Icon_ctl

bit IM = 0

character mode, full display

Table 25

bit IB = 0

icon blink disabled

Screen_conf

bit L = 0

default conﬁguration

Table 23

Disp_conf

bit P = 0; bit Q = 0

default conﬁgurations

Table 24

Temp_ctl

bit TC1 = 0; bit TC2 = 0 default temperature coefﬁcient

Table 28

VLCD_set

VLCD generator off

Table 32

I2C-bus interface reset

HV_gen

bit S1 = 1; bit S0 = 0

VLCD generator set to 3 internal stages

(4 voltage multipliers)

Table 30

LCD nom

()

0.08

1.82

PCF2119AU/2DA/2 Datasheet(PDF) 8 Page - NXP Semiconductors

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