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PCF2119FU/2/F2 Datasheet(PDF) 29 Page - NXP Semiconductors |
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PCF2119FU/2/F2 Datasheet(HTML) 29 Page - NXP Semiconductors |
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29 / 79 page ![]() PCF2119X_5 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 13 August 2009 29 of 79 NXP Semiconductors PCF2119x LCD controllers/drivers The previous Set_CGRAM or Set_DDRAM command determines if data is written into CGRAM or DDRAM. After writing, the address counter automatically increments or decrements by 1, in accordance with the Entry_mode_set (see Section 10.2.2.3). Only bit 4 to bit 0 of CGRAM data are valid, bit 7 to bit 5 are ‘don’t care’. 10.2.2 Standard instructions (bit H = 0) 10.2.2.1 Clear_display Clear_display: writes usually the character code 20h (blank pattern) into all DDRAM addresses except for the character sets ‘R’ and ‘V’ where the character code 20h is not a blank pattern. In addition Clear_display • sets the DDRAM address counter to logic 0 • returns the display to its original position, if it was shifted. Thus, the display disappears and the cursor or blink position goes to the left edge of the display • sets entry mode bit I_D = 1 (increment mode); bit S of entry mode does not change The instruction Clear_display requires extra execution time. This may be allowed by checking the busy flag bit BF or by waiting until the 165 clock cycles have elapsed. The latter must be applied where no read-back options are foreseen, as in some Chip-On-Glass (COG) applications. Remark: When using the character sets ‘R’ or ‘V’, where the character code 20h is not the blank pattern, the following alternative instruction set has to be used: 1. Switch display off (Display_ctl, bit D = 0). 2. Write a blank pattern into all DDRAM addresses (Write_data). 3. Switch display on (Display_ctl, bit D = 1). 10.2.2.2 Return_home Return_home: Sets the DDRAM address counter to logic 0 and switches a shifted display back to an unshifted state. The DDRAM content remain unchanged. The cursor or blink position goes to the left of the first display line. Bit I_D and bit S of the Entry_mode_set instruction remain unchanged. Table 16. Clear_display bit description Bit Symbol Value Description RS - 0 see Table 10 R/W- 0 7 to 0 - 00000001 fixed value Table 17. Return_home bit description Bit Symbol Value Description RS - 0 see Table 10 R/W- 0 7 to 0 - 00000010 fixed value |
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