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33784 Datasheet(PDF) 17 Page - Freescale Semiconductor, Inc |
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33784 Datasheet(HTML) 17 Page - Freescale Semiconductor, Inc |
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17 / 30 page ![]() Analog Integrated Circuit Device Data Freescale Semiconductor 17 33784 FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES When an enhanced long word or short word is sent on the bus, the 33784 will calculate a CRC as each bit is received. The CRC is calculated using the polynomial and seed that have been programmed into the IC via the bus. At the conclusion of the transmission, the 33784 will compare the calculated CRC with the CRC included within the message. If the two match, the message is considered valid and the 33784 will act on the message accordingly. If the calculated CRC does not match the CRC included within the message, the 33784 will ignore the transmission and the message will be discarded. STANDARD DBUS RESPONSE STRUCTURE There are two standard response lengths to correspond with the two standard command word lengths. A standard long response always consists of 16 data bits and 4 CRC bits. A standard short response always consists of 8 data bits and 4 CRC bits. Refer to Table 8. In both cases, the data bits are sent first, starting with the MSB, and are followed by the CRC bits. The CRC bits are calculated from the data bits using the standard polynomial X4+1 and seed 1010. The polynomial and seed cannot be changed when responding in standard mode. Normally, standard long responses will be sent for standard long commands, and standard short responses will be sent for standard short commands. However, if a long command is followed by a short command, then the response to the long command will occur during the short command and will be truncated. In this case, the response to the long command is considered invalid. Similarly, if a short command is followed by a long command, then the response to the short command will occur during the long command and will contain extra bits. In this case the response to the short command is considered invalid. ENHANCED DBUS RESPONSE STRUCTURE There are two enhanced response lengths to correspond with the two enhanced command word lengths. Like the standard long word, an enhanced long response always consists of 16 data bits and 4 CRC bits. The data bits are sent first, starting with the MSB, and are followed by the CRC bits. The CRC bits are calculated from the data bits using the polynomial and seed that was programmed into the IC via the bus. An enhanced short response consists of either 8 or 10 data bits and 4 CRC bits. The enhanced short response will have 8 data bits if the enhanced short command did not use the optional 2 bits, and it will have 10 data bits if the enhanced short command did use the optional 2 bits. In certain cases, the optional 2 bits might be used in the command, but due to the nature of the command, the response only contains 8 bits of data. In this circumstance, the response will be right-padded with zeros so that 10 data bits are sent, followed by the CRC. In other cases, the optional 2 bits might not be used in the command, but due to the nature of the command, the response contains 10 bits of data. In this circumstance, the 2 least significant bits of the response data will be dropped and only the 8 most significant data bits are sent, followed by the CRC. This is illustrated in logic Commands and Registers, page 18. Table 7. Standard and Enhanced DBUS Command Structure Word Type Symbol First Data Address Command CRC Last Standard Long Word LW D7 D6 D5 D4 D3 D2 D1 D0 A3 A2 A1 A0 C3 C2 C1 C0 X3 X2 X1 X0 Enhanced Long Word ELW D7 D6 D5 D4 D3 D2 D1 D0 A3 A2 A1 A0 C3 C2 C1 C0 X3 X2 X1 X0 Standard Short Word SW A3 A2 A1 A0 C3 C2 C1 C0 X3 X2 X1 X0 8-Bit Enhanced Short Word 8-Bit ESW A3 A2 A1 A0 C3 C2 C1 C0 X3 X2 X1 X0 10-Bit Enhanced Short Word 10-Bit ESW D1 D0 A3 A2 A1 A0 C3 C2 C1 C0 X3 X2 X1 X0 Table 8. Standard and Enhanced DBUS Response Structure Word Type Symbol First Response CRC Last Standard Long Word LW D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X3 X2 X1 X0 Enhanced Long Word ELW D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X3 X2 X1 X0 Standard Short Word SW D7 D6 D5 D4 D3 D2 D1 D0 X3 X2 X1 X0 8-Bit Enhanced Short Word 8-Bit ESW D7 D6 D5 D4 D3 D2 D1 D0 X3 X2 X1 X0 10-Bit Enhanced Short Word 10-Bit ESW D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X3 X2 X1 X0 |
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