SC9822P datasheet(18/30 Pages) SILAN

18 / 30 page

SC9822P

HANGZHOU SILAN MICROELECTRONICS CO.,LTD

REV:1.0

2006.07.21

Http: www.silan.com.cn

Page 18 of 30

(Continued)

Symbol

Address

R/W

Initialization

Description

SC91H [7:0]

Note: The flag of this

denotes

the

state

signal;

the

status is not satisfied,

the corresponding bit

will clear automatically.

0x54

0x00

Bit[3] : LocalReset status signal

0-> none LocalReset operation

1-> LocalReset operating

Note:

In normal, LocalReset operating time is very

short, so the status signal should remain 0.

Bit[4]: Decoder operation status signal

0-> decoder stop

1-> decoder operate

Bit[5]: Encoder operation status signal:

0-> encoder stop,

1-> encoder operate

Bit[6]: Dram overflow symbol

0-> Dram in normal

1-> Dram overflow

Bit[7]: Dram empty symbol

0->

Dram

have

valid

data

supply

for

decoder,

1-> Dram empty, no valid data supply for

decoder.

MSC92H High[7:0]

0x55

0x00

Bit[7:0]: The remain valid data in DRAM take

page as unit. The high 8 bit data, each

page is 256×16bit.

MSC92HLow [7:0]

0x56

0x00

Bit[7:0]: The remain valid data in Dram take

page as unit, there is the low 8 bits,

each page is 256×16bits.

Note: because the 16-bit pointer is divided two

parts for read operation, in the reading,

the pointer also operating, so we should

notice the carry bit in reading operation

of main control processing.

Esp configuration register

BitPoolPageLimitHigh

[7:0]

0x58

0x07

BitPoolPageLimitHigh and

BitPoolPageLimitLow form the up limit of

DRAM, and determined the DRAM space as

ESP buffer;

Note:

the external DRAM space of BitPool

address which can be accessed by BitPool is

Page[0, BitPoolLimitHigh &

BitPoolPageLimitLow]. In the current MCU

design, each page is 256×16bit

(To be continued)

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