56F8355 datasheet(49/172 Pages) FREESCALE

49 / 172 page

Peripheral Memory Mapped Registers

56F8355 Technical Data, Rev. 17

Freescale Semiconductor

Preliminary

TMRA2_CNTR

$25

Counter Register

TMRA2_CTRL

$26

Control Register

TMRA2_SCR

$27

Status and Control Register

TMRA2_CMPLD1

$28

Comparator Load Register 1

TMRA2_CMPLD2

$29

Comparator Load Register 2

TMRA2_COMSCR

$2A

Comparator Status and Control Register

Reserved

TMRA3_CMP1

$30

Compare Register 1

TMRA3_CMP2

$31

Compare Register 2

TMRA3_CAP

$32

Capture Register

TMRA3_LOAD

$33

Load Register

TMRA3_HOLD

$34

Hold Register

TMRA3_CNTR

$35

Counter Register

TMRA3_CTRL

$36

Control Register

TMRA3_SCR

$37

Status and Control Register

TMRA3_CMPLD1

$38

Comparator Load Register 1

TMRA3_CMPLD2

$39

Comparator Load Register 2

TMRA3_COMSCR

$3A

Comparator Status and Control Register

Table 4-12 Quad Timer B Registers Address Map

(TMRB_BASE = $00 F080)

Quad Timer B is NOT available in the 56F8155 device

Address Offset

TMRB0_CMP1

Compare Register 1

TMRB0_CMP2

Compare Register 2

TMRB0_CAP

Capture Register

TMRB0_LOAD

Load Register

TMRB0_HOLD

Hold Register

TMRB0_CNTR

Counter Register

TMRB0_CTRL

Control Register

TMRB0_SCR

Status and Control Register

TMRB0_CMPLD1

Comparator Load Register 1

Table 4-11 Quad Timer A Registers Address Map (Continued)

(TMRA_BASE = $00 F040)

Address Offset

56F8355 Datasheet(PDF) 49 Page - Freescale Semiconductor, Inc

56F8355 Datasheet(HTML) 49 Page - Freescale Semiconductor, Inc

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