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56F8366 Datasheet(PDF) 164 Page - Freescale Semiconductor, Inc |
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56F8366 Datasheet(HTML) 164 Page - Freescale Semiconductor, Inc |
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164 / 182 page ![]() 56F8366 Technical Data, Rev. 7 164 Freescale Semiconductor Preliminary Figure 10-18 TXD Pulse Width 10.14 Controller Area Network (CAN) Timing Note: CAN is NOT available in the 56F8166 device. Figure 10-19 Bus Wake Up Detection 10.15 JTAG Timing Table 10-22 CAN Timing1 1. Parameters listed are guaranteed by design Characteristic Symbol Min Max Unit See Figure Baud Rate BRCAN — 1 Mbps — Bus Wake Up detection T WAKEUP 5 — μs 10-19 Table 10-23 JTAG Timing Characteristic Symbol Min Max Unit See Figure TCK frequency of operation using EOnCE1 fOP DC SYS_CLK/8 MHz 10-20 TCK frequency of operation not using EOnCE1 fOP DC SYS_CLK/4 MHz 10-20 TCK clock pulse width tPW 50 — ns 10-20 TMS, TDI data set-up time tDS 5— ns 10-21 TMS, TDI data hold time tDH 5— ns 10-21 TXDPW TXD SCI receive data pin (Input) T WAKEUP CAN_RX CAN receive data pin (Input) |
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