ATmega324P datasheet(107/377 Pages) ATMEL

107 / 377 page

107

7674F–AVR–09/09

ATmega164P/324P/644P

• Bits 2:0 – CS02:0: Clock Select

The three Clock Select bits select the clock source to be used by the Timer/Counter.

If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the

counter even if the pin is configured as an output. This feature allows software control of the

counting.

13.9.3

TCNT0 – Timer/Counter Register

The Timer/Counter Register gives direct access, both for read and write operations, to the

Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes) the Compare

Match on the following timer clock. Modifying the counter (TCNT0) while the counter is running,

introduces a risk of missing a Compare Match between TCNT0 and the OCR0x Registers.

13.9.4

OCR0A – Output Compare Register A

The Output Compare Register A contains an 8-bit value that is continuously compared with the

counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to

generate a waveform output on the OC0A pin.

Table 13-9.

Clock Select Bit Description

CS02

CS01

CS00

Description

No clock source (Timer/Counter stopped)

001

clkI/O/(No prescaling)

010

clkI/O/8 (From prescaler)

011

clkI/O/64 (From prescaler)

100

clkI/O/256 (From prescaler)

101

clkI/O/1024 (From prescaler)

External clock source on T0 pin. Clock on falling edge.

External clock source on T0 pin. Clock on rising edge.

Bit

76543210

0x26 (0x46)

TCNT0[7:0]

TCNT0

Read/Write

R/W

Initial Value

00000000

Bit

76543210

0x27 (0x47)

OCR0A[7:0]

OCR0A

Read/Write

R/W

Initial Value

00000000

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