ATmega324P datasheet(31/377 Pages) ATMEL

31 / 377 page

7674F–AVR–09/09

ATmega164P/324P/644P

7.2.2

Clock Startup Sequence

Any clock source needs a sufficient V

CC to start oscillating and a minimum number of oscillating

cycles before it can be considered stable.

To ensure sufficient V

CC, the device issues an internal reset with a time-out delay (tTOUT) after

the device reset is released by all other reset sources. “On-chip Debug System” on page 45

describes the start conditions for the internal reset. The delay (t

TOUT) is timed from the Watchdog

Oscillator and the number of cycles in the delay is set by the SUTx and CKSELx fuse bits. The

selectable delays are shown in Table 7-2. The frequency of the Watchdog Oscillator is voltage

dependent as shown in Section 27. “ATmega644P Typical Characteristics” on page 338.

Main purpose of the delay is to keep the AVR in reset until it is supplied with minimum Vcc. The

delay will not monitor the actual voltage and it will be required to select a delay longer than the

Vcc rise time. If this is not possible, an internal or external Brown-Out Detection circuit should be

used. A BOD circuit will ensure sufficient Vcc before it releases the reset, and the time-out delay

can be disabled. Disabling the time-out delay without utilizing a Brown-Out Detection circuit is

not recommended.

The oscillator is required to oscillate for a minimum number of cycles before the clock is consid-

ered stable. An internal ripple counter monitors the oscillator output clock, and keeps the internal

reset active for a given number of clock cycles. The reset is then released and the device will

start to execute. The recommended oscillator start-up time is dependent on the clock type, and

varies from 6 cycles for an externally applied clock to 32K cycles for a low frequency crystal.

The start-up sequence for the clock includes both the time-out delay and the start-up time when

the device starts up from reset. When starting up from Power-save or Power-down mode, Vcc is

assumed to be at a sufficient level and only the start-up time is included.

7.2.3

Clock Source Connections

The pins XTAL1 and XTAL2 are input and output, respectively, of an inverting amplifier which

can be configured for use as an On-chip Oscillator, as shown in Figure 7-2 on page 32. Either a

quartz crystal or a ceramic resonator may be used.

C1 and C2 should always be equal for both crystals and resonators. The optimal value of the

capacitors depends on the crystal or resonator in use, the amount of stray capacitance, and the

electromagnetic noise of the environment. For ceramic resonators, the capacitor values given by

the manufacturer should be used.

Table 7-2.

Number of Watchdog Oscillator Cycles

Typ Time-out (V

CC = 5.0V)

Typ Time-out (V

CC = 3.0V)

Number of Cycles

0 ms

4.1 ms

4.3 ms

512

65 ms

69 ms

8K (8,192)

ATmega324P Datasheet(PDF) 31 Page - ATMEL Corporation

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