ATmega324P datasheet(51/377 Pages) ATMEL

51 / 377 page

7674F–AVR–09/09

ATmega164P/324P/644P

Figure 1. MCU Start-up, RESET Tied to VCC

Figure 2. MCU Start-up, RESET Extended Externally

Table 1. Power On Reset Specifications

Note:

1. Before rising, the supply has to be between

PORMIN and VPORMAX to ensure a Reset.

9.0.4

External Reset

An External Reset is generated by a low level on the RESET pin. Reset pulses longer than the

minimum pulse width (see “System and Reset Characteristics” on page 332) will generate a

reset, even if the clock is not running. Shorter pulses are not guaranteed to generate a reset.

When the applied signal reaches the Reset Threshold Voltage – V

RST – on its positive edge, the

delay counter starts the MCU after the Time-out period – t

TOUT – has expired.

Symbol

Parameter

Min

Typ

Max

Units

POT

Power-on Reset Threshold Voltage (rising)

1.1

1.4

1.7

Power-on Reset Threshold Voltage (falling)(1)

0.8

1.3

1.6

VPORMAX

VCC Max. start voltage to ensure internal

Power-on Reset signal

0.4

VPORMIN

VCC Min. start voltage to ensure internal

Power-on Reset signal

-0.1

VCCRR

VCC Rise Rate to ensure Power-on Reset

0.01

V/ms

RESET

TIME-OUT

INTERNAL

RESET

TOUT

RST

PORMA

VCC

CCRR

PORMIN

RESET

TIME-OUT

INTERNAL

RESET

tTOUT

VRST

VCC

ATmega324P Datasheet(PDF) 51 Page - ATMEL Corporation

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