ATmega324P datasheet(22/377 Pages) ATMEL

22 / 377 page

7674F–AVR–09/09

ATmega164P/324P/644P

6.5

I/O Memory

The I/O space definition of the ATmega164P/324P/644P is shown in “Register Summary” on

page 356.

All ATmega164P/324P/644P I/Os and peripherals are placed in the I/O space. All I/O locations

may be accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between

the 32 general purpose working registers and the I/O space. I/O Registers within the address

range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these regis-

ters, the value of single bits can be checked by using the SBIS and SBIC instructions. Refer to

the instruction set section for more details. When using the I/O specific commands IN and OUT,

the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space

using LD and ST instr u ction s , 0x2 0 must be adde d to t h e s e ad dre s ses. The

ATmega164P/324P/644P is a complex microcontroller with more peripheral units than can be

supported within the 64 location reserved in Opcode for the IN and OUT instructions. For the

Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instruc-

tions can be used.

For compatibility with future devices, reserved bits should be written to zero if accessed.

Reserved I/O memory addresses should never be written.

Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most

other AVRs, the CBI and SBI instructions will only operate on the specified bit, and can therefore

be used on registers containing such Status Flags. The CBI and SBI instructions work with reg-

isters 0x00 to 0x1F only.

The I/O and peripherals control registers are explained in later sections.

The ATmega164P/324P/644P contains three General Purpose I/O Registers, see “Register

Description” on page 23. These registers can be used for storing any information, and they are

particularly useful for storing global variables and Status Flags. General Purpose I/O Registers

within the address range 0x00 - 0x1F are directly bit-accessible using the SBI, CBI, SBIS, and

SBIC instructions.

ATmega324P Datasheet(PDF) 22 Page - ATMEL Corporation