ATmega324P datasheet(148/377 Pages) ATMEL

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7674F–AVR–09/09

ATmega164P/324P/644P

15.7.4

Phase Correct PWM Mode

The phase correct PWM mode (WGM22:0 = 1 or 5) provides a high resolution phase correct

PWM waveform generation option. The phase correct PWM mode is based on a dual-slope

operation. The counter counts repeatedly from BOTTOM to TOP and then from TOP to BOT-

TOM. TOP is defined as 0xFF when WGM22:0 = 1, and OCR2A when MGM22:0 = 5. In

non-inverting Compare Output mode, the Output Compare (OC2x) is cleared on the compare

match between TCNT2 and OCR2x while upcounting, and set on the compare match while

downcounting. In inverting Output Compare mode, the operation is inverted. The dual-slope

operation has lower maximum operation frequency than single slope operation. However, due to

the symmetric feature of the dual-slope PWM modes, these modes are preferred for motor con-

trol applications.

In phase correct PWM mode the counter is incremented until the counter value matches TOP.

When the counter reaches TOP, it changes the count direction. The TCNT2 value will be equal

to TOP for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown

on Figure 15-7. The TCNT2 value is in the timing diagram shown as a histogram for illustrating

the dual-slope operation. The diagram includes non-inverted and inverted PWM outputs. The

small horizontal line marks on the TCNT2 slopes represent compare matches between OCR2x

and TCNT2.

Figure 15-7. Phase Correct PWM Mode, Timing Diagram

The Timer/Counter Overflow Flag (TOV2) is set each time the counter reaches BOTTOM. The

Interrupt Flag can be used to generate an interrupt each time the counter reaches the BOTTOM

value.

In phase correct PWM mode, the compare unit allows generation of PWM waveforms on the

OC2x pin. Setting the COM2x1:0 bits to two will produce a non-inverted PWM. An inverted PWM

output can be generated by setting the COM2x1:0 to three. TOP is defined as 0xFF when

WGM2:0 = 3, and OCR2A when MGM2:0 = 7 (See Table 15-4 on page 154). The actual OC2x

value will only be visible on the port pin if the data direction for the port pin is set as output.

TOVn Interrupt Flag Set

OCnx Interrupt Flag Set

TCNTn

Period

OCnx

(COMnx1:0 = 2)

(COMnx1:0 = 3)

OCRnx Update

ATmega324P Datasheet(PDF) 148 Page - ATMEL Corporation