ATmega324P datasheet(288/377 Pages) ATMEL

288 / 377 page

288

7674F–AVR–09/09

ATmega164P/324P/644P

24.8.10

Reading the Signature Row from Software

To read the Signature Row from software, load the Z-pointer with the signature byte address

given in Table 24-5 on page 288 and set the SIGRD and SPMEN bits in SPMCSR. When an

LPM instruction is executed within three CPU cycles after the SIGRD and SPMEN bits are set in

SPMCSR, the signature byte value will be loaded in the destination register. The SIGRD and

SPMEN bits will auto-clear upon completion of reading the Signature Row Lock bits or if no LPM

instruction is executed within three CPU cycles. When SIGRD and SPMEN are cleared, LPM will

work as described in the Instruction set Manual.

Note:

All other addresses are reserved for future use.

24.8.11

Preventing Flash Corruption

During periods of low V

CC, the Flash program can be corrupted because the supply voltage is

too low for the CPU and the Flash to operate properly. These issues are the same as for board

level systems using the Flash, and the same design solutions should be applied.

A Flash program corruption can be caused by two situations when the voltage is too low. First, a

regular write sequence to the Flash requires a minimum voltage to operate correctly. Secondly,

the CPU itself can execute instructions incorrectly, if the supply voltage for executing instructions

is too low.

Flash corruption can easily be avoided by following these design recommendations (one is

sufficient):

If there is no need for a Boot Loader update in the system, program the Boot Loader Lock

bits to prevent any Boot Loader software updates.

Keep the AVR RESET active (low) during periods of insufficient power supply voltage.

This can be done by enabling the internal Brown-out Detector (BOD) if the operating volt-

age matches the detection level. If not, an external low V

CC reset protection circuit can be

used. If a reset occurs while a write operation is in progress, the write operation will be

completed provided that the power supply voltage is sufficient.

Keep the AVR core in Power-down sleep mode during periods of low V

CC. This will pre-

vent the CPU from attempting to decode and execute instructions, effectively protecting

the SPMCSR Register and thus the Flash from unintentional writes.

Table 24-5.

Signature Row Addressing

Signature Byte

Z-Pointer Address

Device Signature Byte 1

0x0000

Device Signature Byte 2

0x0002

Device Signature Byte 3

0x0004

RC Oscillator Calibration Byte

0x0001

ATmega324P Datasheet(PDF) 288 Page - ATMEL Corporation

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