ATmega324P datasheet(301/377 Pages) ATMEL

301 / 377 page

301

7674F–AVR–09/09

ATmega164P/324P/644P

PAGEL

PD7

Program Memory and EEPROM data Page Load.

BS2

PA0

Byte Select 2.

DATA

PB7-0

I/O

Bi-directional Data bus (Output when OE is low).

Table 25-10. BS2 and BS1 Encoding

BS2

BS1

Flash / EEPROM

Address

Flash Data

Loading /

Reading

Fuse

Programming

Reading Fuse

and Lock Bits

Low Byte

Fuse Low Byte

High Byte

Lockbits

Extended High

Byte

Reserved

Extended Byte

Extended Fuse

Byte

Reserved

Fuse High Byte

Table 25-11. Pin Values Used to Enter Programming Mode

Symbol

Value

PAGEL

Prog_enable[3]

XA1

Prog_enable[2]

XA0

Prog_enable[1]

BS1

Prog_enable[0]

Table 25-12. XA1 and XA0 Enoding

XA1

XA0

Action when XTAL1 is Pulsed

Load Flash or EEPROM Address (High or low address byte determined

by BS2 and BS1).

Load Data (High or Low data byte for Flash determined by BS1).

Load Command

No Action, Idle

Table 25-13. Command Byte Bit Encoding

Command Byte

Command Executed

1000 0000

Chip Erase

0100 0000

Write Fuse bits

0010 0000

Write Lock bits

0001 0000

Write Flash

0001 0001

Write EEPROM

Table 25-9.

Pin Name Mapping

Signal Name in

Programming Mode

Pin Name

I/O

Function

ATmega324P Datasheet(PDF) 301 Page - ATMEL Corporation

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