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ATmega88 Datasheet(PDF) 201 Page - ATMEL Corporation |
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ATmega88 Datasheet(HTML) 201 Page - ATMEL Corporation |
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201 / 340 page ![]() 201 7530H–AVR–02/09 ATmega48/88/168 Automotive A comparison of the USART in MSPIM mode and the SPI pins is shown in Table 18-4 on page 201. 19. 2-wire Serial Interface 19.1 Features • Simple Yet Powerful and Flexible Communication Interface, only two Bus Lines Needed • Both Master and Slave Operation Supported • Device can Operate as Transmitter or Receiver • 7-bit Address Space Allows up to 128 Different Slave Addresses • Multi-master Arbitration Support • Up to 400 kHz Data Transfer Speed • Slew-rate Limited Output Drivers • Noise Suppression Circuitry Rejects Spikes on Bus Lines • Fully Programmable Slave Address with General Call Support • Address Recognition Causes Wake-up When AVR is in Sleep Mode 19.2 2-wire Serial Interface Bus Definition The 2-wire Serial Interface (TWI) is ideally suited for typical microcontroller applications. The TWI protocol allows the systems designer to interconnect up to 128 different devices using only two bi-directional bus lines, one for clock (SCL) and one for data (SDA). The only external hard- ware needed to implement the bus is a single pull-up resistor for each of the TWI bus lines. All devices connected to the bus have individual addresses, and mechanisms for resolving bus contention are inherent in the TWI protocol. Figure 19-1. TWI Bus Interconnection Table 18-4. Comparison of USART in MSPIM mode and SPI pins. USART_MSPIM SPI Comment TxDn MOSI Master Out only RxDn MISO Master In only XCKn SCK (Functionally identical) (N/A) SS Not supported by USART in MSPIM Device 1 Device 2 Device 3 Device n SDA SCL ........ R1 R2 V CC |
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